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nx_mcu_q4_gate.nx

buildroot/runtime/nx_mcu_q4_gate.nx

6727 B147 linesdepth 3pulls 4 transitivereach 0 importersview sourcekind gate/prooftopic mcu
docsdependenciesstructsconstsfunctions

about

nx_mcu_q4_gate.nx -- pins the int4 x int8 MCU kernel to EXACT integer answers. Every expectation below is hand-computable, so this gate asserts EQUALITY, not closeness. That matters: the two classic ways to get this kernel wrong -- swapping the low/high nibble order, and reading int8 activations as unsigned -- both still produce plausible, well-scaled numbers. A tolerance-based check would wave them through. So each control is chosen so that the WRONG implementation yields a DIFFERENT NUMBER, and the gate names that number: T2 a swapped packer would emit 0x0F where we require 0xF0. T5b an unsigned read of byte 255 yields 255, not -1. T7b an unsigned-activation dot yields -2011, not 37 -- and the gate asserts it is NOT -2011. T12 is the composition property real inference depends on: summing per-group dots must equal the whole row dot, or every grouped matvec silently drifts from the reference. license_tier: ORIGINAL No hw writes (Rule 26). expect_exit: 0

dependencies 3 imports · 0 importers

nx_syscalls.nx nx_gate_verdict.nx nx_mcu_q4.nx nx_mcu_q4_gate.nx

imports: nx_syscalls.nxnx_gate_verdict.nxnx_mcu_q4.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main gv_ctr sys_mmap gv_head gv_puts sys_write sys_mmap ↻ q4_pack q4_row_bytes q4_val_at q4_code_at gv_check gv_puts ↻ q4_row_bytes ↻ q4_i8 q4_group_dot q4_val_at ↻ q4_i8 ↻ q4_row_dot q4_group_dot ↻ q4_n_groups q4_group_end gv_verdict gv_puts ↻ gv_num sys_mmap ↻ sys_write ↻ sys_munmap gv_journal sys_openat_append sys_mmap ↻ gv_catn sys_mmap ↻ sys_munmap ↻ sys_now_realtime_sec sys_mmap ↻ sys_clock_gettime_real gv_cat sys_write ↻ sys_close

structs

none

consts

none

functions

18func main() -> i64