nx_mcu_ready_gate.nx

nx_mcu_ready_gate.nx -- pins the hardware-test chokepoint, using the MEASURED esp32-ai workload on the MEASURED S3 N16R8 row so the gate is about a real bring-up, not invented numbers. The composition has one asymmetry that must never silently invert, and T4/T5 exist to pin it: SAFETY DOMINATES FIT. A config that fits perfectly is still refused when the write is irreversible, and when BOTH fail the reported blocker is SAFETY -- because a sizing problem is recoverable by picking a smaller model, whereas an unsafe write is a dead board. A symmetric AND would report either, and an operator reading "blocker=FIT" would go shrink the model and then flash an unrecoverable board. T7 is the third-party case and the reason this organ exists: an UNBENCHED board must come back BLOCKED, never READY -- a work order, not a guess. license_tier: ORIGINAL No hw writes (Rule 26). expect_exit: 0