nx_nishi_usb_preempt.nx

nx_nishi_usb_preempt.nx -- x86 ladder R-KERN-3: PREEMPTIVE multitasking (timer IRQ0 preempts tasks). The capstone of the kernel-internals thread: "a kernel that runs tasks". nx_kernel_sched proved a COOPERATIVE scheduler (tasks yield). This proves a PREEMPTIVE one: a timer (IRQ0, IF-gated like the real PIC/PIT, delivered between instructions) forces a context switch between two tasks that NEVER yield -- each runs an infinite increment loop, and the timer alone makes both progress, round-robin. It composes onto R-KERN-1's IDT: the timer handler is the IDT[0x20] vector; here the scheduler's context switch + the IF-gated timer delivery are modeled (same level as nx_kernel_sched's emu_resume), the tasks are real x86 the emu executes. The proof that the context switch is REAL (registers preserved across preemption): each task sets its counter pointer rbx ONCE at entry, then loops reading/writing [rbx] without re-setting it. The timer preempts mid-loop repeatedly; both counters keep advancing correctly ONLY if each task's rbx (and rax/rcx) survive every switch -- i.e. a genuine per-task context, not shared state. KAT: (T1) BOTH tasks made real progress (both counters > 0) = preemptive multitasking; (T2) round-robin fairness (the two counters are close, neither starved); (T3) the timer actually drove the switching (>= ~the requested number of ticks occurred). NEG/liar-kill (T4): with the timer MASKED (the kernel's STI is a no-op), task B NEVER runs (counter B == 0) -- proving progress is driven by real IF-gated timer preemption, not by the tasks cooperating. HONEST SCOPE: the context-switch mechanism + the IF-gated periodic timer are modeled (as in nx_kernel_sched / nx_nishios_irq); a real 8259 PIC + 8254 PIT + a full x86 context-switch handler that saves/restores via the stack are the hardware refinements. No /dev, no hardware writes (Rule 26). expect_exit: 0 license_tier: ORIGINAL