nx_nofloat_qwen_rope_h2h_gate.nx
buildroot/runtime/nx_nofloat_qwen_rope_h2h_gate.nx
about
nx_nofloat_qwen_rope_h2h_gate.nx -- ARCH H2H: the library's no-float Q16 RoPE vs the reference f32 RoPE.
Same head-dim-64 vector + position + base(1e6) through the lib's rope_apply/rope_freqs (fixed-point) AND the
reference nx_f32_rope_apply_vector (IEEE f32) -- proving same interleaved convention + theta. Library logic
from nx_nofloat_llm.nx (DRY). expect_exit: 0 license_tier: ORIGINAL
dependencies 12 imports · 0 importers
diagram shows first 10 each side; +2 more imports, +0 more importers in the complete lists below.
imports: nx_syscalls.nxnx_tier.nxnx_le.nxnx_tensor.nxnx_gguf.nxnx_gguf_load.nxnx_nofloat_llm.nxnx_f32.nxnx_f32_div.nxnx_f32_cvt.nxnx_f32_rope.nxnx_gate_verdict.nx
imported by: nobody (leaf or entry point)
call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown
structs
| none |
consts
| none |
functions
| 18 | func rh_puts(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 } |
| 19 | func rh_num(v: i64) -> i64 { let b: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m;sys_write(1,"-" as *u8,1)} let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48 as u8;k=1} while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{b[i]=t[k-1-i];i=i+1} sys_write(1,b,k); return 0 } |
| 20 | func rh_absd(a: i64, b: i64) -> i64 { if a>b { return a-b } return b-a } called by 1: main |
| 22 | func main() -> i64 |