code wiki / _hdl_build / nx_paging_emit.nx

nx_paging_emit.nx

buildroot/runtime/_hdl_build/nx_paging_emit.nx

11038 B191 linesdepth 2pulls 2 transitivereach 0 importersview sourcekind tool
docsdependenciesstructsconstsfunctions

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nx_paging_emit.nx -- CPU-DATAPATH PAGING test (virtual-memory-paging-mmu, integration rung). Table-computes a bare-metal rv64 image that proves the CPU TRANSPARENTLY translates virtual addresses through the page table once satp.MODE=Sv39 -- no explicit walk, just a normal load: 1. lay a Sv39 gigapage PTE (0x20000007 = PPN 0x80000<<10 | V|R|W) at root[VPN2=3]=0x80008018 2. store a sentinel (0x5ECA1234) to PHYSICAL 0x80009000 (satp still Bare = identity) 3. build satp = (Sv39<<60) | root_PPN(0x80008) and csrrw it -> translation ON 4. LOAD from VIRTUAL 0xC0009000 -- the CPU walks the page table and reads PA 0x80009000 5. verify the loaded word == the sentinel -> emit "VOK" (else "X"); finisher. "VOK" proves transparent CPU-datapath VA translation (the gigapage maps VA 0xC0000000.. -> PA 0x80000000.., so VA 0xC0009000 != its PA 0x80009000 -- a real translation, not identity). Zero hand-written machine code: a tiny rv64 encoder + two-pass forward-branch resolution. nx_paging_emit -> runtime/_hdl_build/_paging_virt.bin + .gold Sovereign, no gcc/.sh. license_tier: ORIGINAL

dependencies 1 imports · 0 importers

nx_syscalls.nx nx_paging_emit.nx

imports: nx_syscalls.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main pe_parse_num sys_mmap pe_emit_image pe_w32 pe_lui pe_li32u pe_li32 pe_w32 ↻ pe_lui ↻ pe_addi pe_w32 ↻ pe_slli pe_srli pe_csrrw pe_li32 ↻ pe_store pe_addi ↻ pe_slli ↻ pe_or pe_load pe_branch pe_emit_str pe_w32 ↻ pe_addi ↻ pe_store ↻ pe_jal sys_openat_wr pe_p sys_write sys_write ↻ sys_close pe_fn sys_mmap ↻ sys_write ↻ sys_openat_append

structs

none

consts

16const PE_MAGIC_8192: i64 = 8192
18const PE_OUT: *u8 = "runtime/_hdl_build/_paging_virt.bin"
19const PE_GOLD: *u8 = "runtime/_hdl_build/_paging_virt.bin.gold"
20const PE_LOG: *u8 = "knowledge/status/paging.log"
22const PE_UART: i64 = 0x10000000
23const PE_FIN: i64 = 0x100000
24const PE_PASS: i64 = 0x5555
25const PE_MEM_BASE: i64 = 0x80000000
26const PE_CSR_SATP: i64 = 0x180
27const PE_CSR_MSTATUS: i64 = 0x300
28const PE_CSR_MEPC: i64 = 0x341
29const PE_MRET: i64 = 0x30200073 // mret instruction word
30const PE_MPP_S: i64 = 0x800 // mstatus with MPP=01 (Supervisor)
32const RV_X0: i64 = 0
33const RV_T0: i64 = 5 // UART
34const RV_T1: i64 = 6 // value / satp
35const RV_T2: i64 = 7 // mode scratch
36const RV_T3: i64 = 28 // loaded
37const RV_T4: i64 = 29 // expected
38const RV_T5: i64 = 30 // base scratch
40const PE_PTE_ADDR: i64 = 0x80008000 // root page table
41const PE_PTE_OFF: i64 = 0x18 // root[VPN2=3] = +3*8
42const PE_PTE_VAL: i64 = 0x20000007 // gigapage PPN 0x80000, V|R|W
43const PE_SENT_PA: i64 = 0x80009000 // sentinel physical address
44const PE_SENT_VAL: i64 = 0x5ECA1234
45const PE_VA: i64 = 0xC0009000 // virtual address mapping -> PE_SENT_PA
46const PE_SATP_PPN: i64 = 0x80008 // root >> 12
47const PE_SV39: i64 = 8

functions

49func pe_lui(rd: i64, imm20: i64) -> i64 { return ((imm20 & 0xFFFFF) << 12) | (rd << 7) | 0x37 }
50func pe_addi(rd: i64, rs1: i64, imm: i64) -> i64 { return ((imm & 0xFFF) << 20) | (rs1 << 15) | (rd << 7) | 0x13 }
51func pe_load(rd: i64, rs1: i64, f3: i64, imm: i64) -> i64 { return ((imm & 0xFFF) << 20) | (rs1 << 15) | (f3 << 12) | (rd << 7) | 0x03 }
called by 1: pe_emit_image
52func pe_store(rs2: i64, rs1: i64, f3: i64, imm: i64) -> i64
57func pe_branch(rs1: i64, rs2: i64, f3: i64, imm: i64) -> i64
called by 1: pe_emit_image
64func pe_jal(rd: i64, imm: i64) -> i64
called by 1: pe_emit_image
71func pe_slli(rd: i64, rs1: i64, shamt: i64) -> i64 { return ((shamt & 0x3f) << 20) | (rs1 << 15) | (1 << 12) | (rd << 7) | 0x13 }
72func pe_srli(rd: i64, rs1: i64, shamt: i64) -> i64 { return ((shamt & 0x3f) << 20) | (rs1 << 15) | (5 << 12) | (rd << 7) | 0x13 }
called by 1: pe_li32u
73func pe_or(rd: i64, rs1: i64, rs2: i64) -> i64 { return (rs2 << 20) | (rs1 << 15) | (6 << 12) | (rd << 7) | 0x33 }
called by 1: pe_emit_image
74func pe_csrrw(rd: i64, csr: i64, rs1: i64) -> i64 { return ((csr & 0xfff) << 20) | (rs1 << 15) | (1 << 12) | (rd << 7) | 0x73 }
called by 1: pe_emit_image
76func pe_w32(buf: *u8, off: i64, w: i64) -> i64
82func pe_li32(buf: *u8, off: i64, rd: i64, val: i64) -> i64
91func pe_li32u(buf: *u8, off: i64, rd: i64, val: i64) -> i64
97func pe_emit_str(buf: *u8, off: i64, s: *u8, n: i64) -> i64
called by 1: pe_emit_image calls 3: pe_w32pe_addipe_store
103func pe_p(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
called by 1: main calls 1: sys_write
104func pe_fn(fd: i64, v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m}; let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48;k=1}; while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1}; var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1}; sys_write(fd,bb,k); return 0 }
called by 1: main calls 2: sys_mmapsys_write
108func pe_emit_image(buf: *u8, fail_off: i64, halt_off: i64, pos_out: *i64, pte_val: i64, cont_off: i64) -> i64
154func pe_parse_num(s: *u8) -> i64
called by 1: main
167func main(argc: i64, argv: *i64) -> i64