code wiki / _hdl_build / nx_pipeline_fetch_test.nx

nx_pipeline_fetch_test.nx

buildroot/runtime/_hdl_build/nx_pipeline_fetch_test.nx

3480 B43 linesdepth 3pulls 3 transitivereach 0 importersview sourcekind gate/prooftopic pipeline
docsdependenciesstructsconstsfunctions

about

nx_pipeline_fetch_test.nx -- proves the operator's live-fetch architecture law with measured numbers: from ONE IP the team CANNOT fan out like Claude, but PIPELINE (process) parallelism hides the CPU stages under the unavoidable polite fetch pacing, so the team reaches the irreducible polite floor. Exit 0 iff: (1) the pipeline strictly beats the naive team barrier (process-parallelism pays off), (2) the pipeline is POLITE-OPTIMAL (CPU fully hidden -> wall within one tail of the floor), (3) the pipeline never undercuts the polite floor (we DON'T cheat the host -- politeness preserved).

dependencies 2 imports · 0 importers

nx_pipeline_fetch.nx nx_syscalls.nx nx_pipeline_fetch_test.nx

imports: nx_pipeline_fetch.nxnx_syscalls.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main tp sys_write pf_claude_barrier pf_team_barrier pf_team_pipeline pf_max3 pf_polite_floor pf_pipeline_saving pf_team_barrier ↻ pf_team_pipeline ↻ tn sys_mmap sys_write ↻ pf_is_polite_optimal pf_team_pipeline ↻ pf_polite_floor ↻ sys_exit

structs

none

consts

none

functions

10func tp(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
called by 1: main calls 1: sys_write
11func tn(v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m;sys_write(1,"-" as *u8,1)}; let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48;k=1}; while m>0{t[k]=48+(m%10);m=m/10;k=k+1}; var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1}; sys_write(1,bb,k); return 0 }
called by 1: main calls 2: sys_mmapsys_write
13func main() -> i64