code wiki / _hdl_build / nx_rv64_m_gate.nx

nx_rv64_m_gate.nx

buildroot/runtime/_hdl_build/nx_rv64_m_gate.nx

7131 B90 linesdepth 6pulls 7 transitivereach 0 importersview sourcekind gate/prooftopic rv64
docsdependenciesstructsconstsfunctions

about

nx_rv64_m_gate.nx -- GATE: the RV64 M EXTENSION (multiply/divide) -- so the emulator runs REAL programs (they multiply/divide constantly). MUL/DIV/DIVU/REM/REMU decoded + interpreted with EXACT RV64 semantics (div-by-zero -> -1 / dividend; INT_MIN/-1 overflow -> INT_MIN / 0; unsigned via long division). MUL is JIT-accelerated (imul); DIV/REM fail-safe-tier to the interpreter. This is RV64I -> RV64IM (the real base ISA). T1 signed div/rem semantics incl div-by-zero and INT_MIN/-1 overflow (the edge cases real ISAs define carefully). T2 UNSIGNED div/rem (differs from signed on high-bit operands) + DIVU-by-zero. T3 MUL/DIV/REM run end-to-end through the interpreter (a real program). T4 JIT MUL == interpreter (imul-accelerated multiply is correct). T5 a DIV program fail-safe-TIERS: the JIT declines (-1) but the interpreter computes it correctly. expect_exit: 0

dependencies 3 imports · 0 importers

nx_syscalls.nx nx_rv64_fast.nx nx_rv64_jit.nx nx_rv64_m_gate.nx

imports: nx_syscalls.nxnx_rv64_fast.nxnx_rv64_jit.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main g_puts sys_write sys_mmap sdiv64 srem64 g_pn sys_mmap ↻ sys_write ↻ ck g_puts ↻ udiv_mod fk_ltu run_m fk_run sys_mmap ↻ fk_step fk_amo fk_memok fk_ld fk_sext32 fk_sext fk_st fk_ltu ↻ fk_srlmask mulh64 mulhu64 mulhu64 ↻ mulhsu64 mulhu64 ↻ sdiv64 ↻ srem64 ↻ udiv_mod ↻ fk_sext32 ↻ fk_ltu ↻ fk_mmio_hit nx_virtio_read32 nx_virtio_addr_in_range fk_sext ↻ fk_memok ↻

structs

none

consts

18const MEMSZ: i64 = 4096

functions

15func g_puts(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
called by 2: ckmain calls 1: sys_write
16func g_pn(v: i64) -> i64 { let b: *u8=sys_mmap(28); var x: i64=v; if x<0{b[0]=45;sys_write(1,b,1);x=0-x} if x==0{b[0]=48;sys_write(1,b,1);return 0} var d: i64=0; var y: i64=x; while y>0{d=d+1;y=y/10} var i: i64=d-1; y=x; while i>=0{b[i]=(48+(y%10)) as u8;y=y/10;i=i-1} sys_write(1,b,d); return 0 }
called by 1: main calls 2: sys_mmapsys_write
17func ck(name: *u8, c: i64) -> i64 { if c==1 { g_puts(" PASS " as *u8) } else { g_puts(" FAIL " as *u8) } g_puts(name); g_puts("\n" as *u8); return c }
called by 1: main calls 1: g_puts
21func run_m(kind: i64, a: i64, b: i64, opk: *i64, rd: *i64, rs1: *i64, rs2: *i64, imm: *i64, reg: *i64, mem: *u8) -> i64
called by 1: main calls 1: fk_run
30func main() -> i64
calls 15: g_putssys_mmapsdiv64srem64g_pnck+9