code wiki / _hdl_build / nx_rv64_toolchain_gate.nx

nx_rv64_toolchain_gate.nx

buildroot/runtime/_hdl_build/nx_rv64_toolchain_gate.nx

6551 B72 linesdepth 7pulls 9 transitivereach 0 importersview sourcekind gate/prooftopic rv64
docsdependenciesstructsconstsfunctions

about

nx_rv64_toolchain_gate.nx -- END-TO-END SOVEREIGN TOOLCHAIN CLOSURE: prove the assembler and the emulator are now ISA-CONSISTENT (both RV64IM) by running a REAL multiply/divide algorithm through the WHOLE pipeline -- text asm --(nx_rv64_asm)--> machine code --(fk_predecode)--> decoded --(tier_run: interpret cold + JIT hot)--> result. The program (sum of squares 1..10 = 385, then /7 and %7) uses MUL in a hot loop (JIT-compiled) + DIV/REM (tier to interp) -- exercising exactly the M extension just added to BOTH the assembler and the emulator. Closes the debt that the assembler emitted only RV64I while the emulator executed RV64IM (the M-ext gates set FK_ constants directly, bypassing the assembler -- this gate does NOT). T1 assembler M-ext ENCODING KAT: 'mul x8,x6,x6' assembles to the exact RISC-V word 0x02630433. T2 end-to-end on the golden interpreter: assembled program computes 385 / 55 / 0. T3 end-to-end on the TIERED JIT engine: same result, and the MUL loop was actually JIT-compiled + run native. T4 the two agree bit-for-bit (the assembler->tiered-JIT path == the golden path). expect_exit: 0

dependencies 5 imports · 0 importers

nx_syscalls.nx nx_rv64_asm.nx nx_rv64_fast.nx nx_rv64_jit.nx nx_rv64_tier.nx nx_rv64_toolchain_gate.nx

imports: nx_syscalls.nxnx_rv64_asm.nxnx_rv64_fast.nxnx_rv64_jit.nxnx_rv64_tier.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main g_puts sys_write sys_mmap rvasm_assemble_str rvasm_assemble sys_mmap ↻ ra_isws ra_encode sys_mmap ↻ ra_afterword ra_isws ↻ ra_word_is ra_isws ↻ ra_reg ra_skipsep ra_isws ↻ ra_num ra_isdig ra_imm ra_skipsep ↻ ra_ishex ra_isdig ↻ ra_hexval ra_isdig ↻ ra_u ra_imm12 ra_i ra_sh6 ra_r ra_past ra_s ra_label_target ra_skipsep ↻ ra_afterword ↻ ra_find_label ra_b ra_j ra_put fk_w32

structs

none

consts

23const MEMSZ: i64 = 4096

functions

19func g_puts(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
called by 3: g_phckmain calls 1: sys_write
20func g_pn(v: i64) -> i64 { let b: *u8=sys_mmap(28); var x: i64=v; if x<0{b[0]=45;sys_write(1,b,1);x=0-x} if x==0{b[0]=48;sys_write(1,b,1);return 0} var d: i64=0; var y: i64=x; while y>0{d=d+1;y=y/10} var i: i64=d-1; y=x; while i>=0{b[i]=(48+(y%10)) as u8;y=y/10;i=i-1} sys_write(1,b,d); return 0 }
called by 1: main calls 2: sys_mmapsys_write
21func g_ph(v: i64) -> i64 { g_puts("0x" as *u8); let b: *u8=sys_mmap(20); var i: i64=7; var any: i64=0; while i>=0 { let nib: i64=(v>>(i*4))&15; if nib!=0 { any=1 } if any==1 { if nib<10 { b[0]=(48+nib) as u8 } else { b[0]=(87+nib) as u8 } sys_write(1,b,1) } i=i-1 } if any==0 { sys_write(1,"0" as *u8,1) } return 0 }
called by 1: main calls 3: g_putssys_mmapsys_write
22func ck(name: *u8, c: i64) -> i64 { if c==1 { g_puts(" PASS " as *u8) } else { g_puts(" FAIL " as *u8) } g_puts(name); g_puts("\n" as *u8); return c }
called by 1: main calls 1: g_puts
25func main() -> i64