nx_select_joint.nx

nx_select_joint.nx -- joint DAG variant selector (MVP: 2-node). SA-5 partial milestone of NISHI_SELF_ASSEMBLY_ROADMAP.md. Full N- node ILP solver deferred to next session; this MVP demonstrates the LOAD-BEARING property: layout compatibility across an edge can force the solver to pick a NON-LOCALLY-OPTIMAL variant at one node to enable a cheaper variant at another node. Selection function (joint, 2-node): S_joint(G, P, K, π) = argmin_{(a, b)} cost(a, P, K, π) + cost(b, P, K, π) + transfer_cost(a, b) s.t. requires(a) ⊆ P AND requires(b) ⊆ P out_layout(a) compatible-with in_layout(b) transfer_cost(a, b) = 0 when out_layout(a) == in_layout(b) (V1; SA-6 will add real transform-bytes cost) MVP scope (this session): - Exactly 2 nodes (producer -> consumer); 1 edge - Exhaustive search over all (a, b) candidate pairs - Layout-compat edge constraint (nx_layout_compatible) - Returns selected indices via *i64 array out[0], out[1] Deferred: - N-node DAGs with topological order + chain composition (next session) - ILP solver for hard cases (SA-6+) - Greedy + backtrack heuristic for large DAGs (SA-7) - Real transfer_cost from edge bandwidth (SA-6 with nx_calibrate emitting bytes-on-wire estimates) - Cross-edge layout transform variants (SA-7) genealogy_id: petabricks_2009 + halide_schedule_search_2019 + polly_loop_polyhedral + cardinal_2026-05-19_self_assembly lineage_id: substrate_select_joint_v1 nx_capability_manifest: variant_class: capability_select_joint variant_id: capability_select_joint_v1_two_node_exhaustive requires_isa: [rv64imac, x86_64]