code wiki / _hdl_build / nx_simd_sse_rot_gate.nx
nx_simd_sse_rot_gate.nx
buildroot/runtime/_hdl_build/nx_simd_sse_rot_gate.nx
about
nx_simd_sse_rot_gate.nx -- SOVEREIGN 128-bit SSE2 packed-shift/bitwise run-KAT
(rung R1 of the sovereign VECTOR backend). Proves the packed ROTATE primitive
-- the inner loop of every ARX cipher (ChaCha/BLAKE/Salsa) -- on REAL x86
silicon, NO gcc/qemu/binutils. AUTHOR=ORGAN, no-false-green.
rotl32(x,n) = (pslld x,n) OR (psrld x,32-n). With x=0x80000001, n=1:
pslld $1 -> 0x00000002 (top bit shifted out of the 32-bit lane)
psrld $31 -> 0x00000001 (top bit becomes bit 0)
por -> 0x00000003 (both halves load-bearing => por is real)
POS exit = 3.
NEG swaps por->pand: 0x2 & 0x1 = 0 -> exit 0 (distinct => real silicon read).
GREEN iff pos==3 AND neg==0 AND pos!=neg. Run-proves: pslld, psrld, por (POS),
pand (NEG), movdqa reg-reg copy, + movdqu load/store again. The padd{b,w,q}/
psub{b,w,d,q} twins share the proven x86_sse_rr path (different opcode byte only).
Appends knowledge/status/simd_vec_kat.log. license_tier: ORIGINAL
dependencies 1 imports · 0 importers
imports: nx_syscalls.nx
imported by: nobody (leaf or entry point)
call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown
structs
| none |
consts
| 18 | const ASM_TOOL: *u8 = "_offc/nxasm_x86_main.elf" |
| 19 | const SV_LOG: *u8 = "knowledge/status/simd_vec_kat.log" |
functions
| 21 | func gw(fd: i64, s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(fd, s, n); return 0 } |
| 22 | func gwn(fd: i64, v: i64) -> i64 |
| 33 | func g_run(path: *u8, argv: *i64) -> i64 |
| 53 | func asm_and_run(spath: *u8, elfpath: *u8) -> i64 |
| 68 | func write_rot_s(path: *u8, use_and: i64) -> i64 |
| 92 | func g_emit(fd: i64, pos: i64, neg: i64, ok: i64) -> i64 |
| 100 | func main() -> i64 |