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nx_simd_vdot_test.nx

buildroot/runtime/nx_simd_vdot_test.nx

5476 B149 linesdepth 6pulls 8 transitivereach 0 importersview sourcekind gate/prooftopic simd
docsdependenciesstructsconstsfunctions

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nx_simd_vdot_test.nx -- widening dot product i16x16 -> i64. The kernel of every ML inference inner loop, every convolution stride, every audio/DSP filter on x86. vpmaddwd does (a*b) pair-wise into 8 i32 lanes in ONE instruction; RV-V does it via vwmul.vv + vwredsum.vs (widening at the codegen layer). We test the bit-exact behaviour vs a hand-written scalar reduce because the widening prevents intermediate overflow that the naive vmul+vreduce_sum would suffer with values > 181 (since 181*181 = 32761 ~ INT16_MAX).

dependencies 2 imports · 0 importers

nx_kernel_v2.nx nx_log.nx nx_simd_vdot_test.nx

imports: nx_kernel_v2.nxnx_log.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main t1_identity_dot pack4_i16 ref_dot sx_i16 t2_large_values_no_overflo pack4_i16 ↻ t3_mixed_sign pack4_i16 ↻ ref_dot ↻ t4_zero_vector pack4_i16 ↻

structs

none

consts

none

functions

17func pack4_i16(a: i64, b: i64, c: i64, d: i64) -> i64
25func sx_i16(x: i64) -> i64
called by 1: ref_dot
32func ref_dot(a: *i64, b: *i64) -> i64
called by 2: t1_identity_dott3_mixed_sign calls 1: sx_i16
47func t1_identity_dot() -> i64
called by 1: main calls 2: pack4_i16ref_dot
71func t2_large_values_no_overflow() -> i64
called by 1: main calls 1: pack4_i16
93func t3_mixed_sign() -> i64
called by 1: main calls 2: pack4_i16ref_dot
119func t4_zero_vector() -> i64
called by 1: main calls 1: pack4_i16
136func main() -> nx_exit