nx_sketch_hll4.nx

sketch_hll4.nx -- HLL_4 with Heule exception table. 4 bits per register addresses rho in [0, 14]; rho = 15 is the SENTINEL meaning "see exception table for the true value." An exception table holds (idx, value) pairs for the rare registers whose true rho exceeds 14. MEMORY: HLL_4 at lg_k=10 = m/2 bytes register array + ~40 bytes header + ~0 bytes exception (lazy-allocated; most workloads never trigger). Total HLL_4-10 < HLL_8-10 by ~46% in typical use. Matches DataSketches HLL_4-12 = 2095 bytes. Heule et al. 2013 observation: P(rho > 14) is small enough that a few sentinel slots + a hash-table-class exception map is strictly cheaper than 6-bit or 8-bit dense storage at high lgK. For HLL_4-12 at N = 10^9, expected exceptions < 50 entries. Per the lossless-language discipline (doc 20): the typed envelope API is invariant across packing strategies. HLL_4, HLL_6, HLL_8 all return the same ApproxI64 shape; users see memory drop without semantic change.