code wiki / _hdl_build / nx_superopt_machinecode_test.nx

nx_superopt_machinecode_test.nx

buildroot/runtime/_hdl_build/nx_superopt_machinecode_test.nx

7041 B149 linesdepth 4pulls 5 transitivereach 0 importersview sourcekind gate/prooftopic superopt
docsdependenciesstructsconstsfunctions

about

nx_superopt_machinecode_test.nx -- the team builds MACHINE CODE UP, MULTI-ARCH, by itself. The algebra (x*C -> (x<<a) +/- (x<<b)) is authored ONCE by search; the per-target ENCODERS lower it to real RV64 AND AArch64 machine-code words, and each is PROVEN by EXECUTION on its own sovereign emulator (no qemu, no JIT, no hand-written stream). This is emit-to-TARGET, not bake-one-binary -- the same invention lands on whatever silicon the spore/seed reaches. I wrote the search + the two encoders; the team produced the bytes and the emulators ran them. Both emulators return the exit register (a0/x0) as an 8-bit status, so each plan is checked exhaustively over the inputs where x*C < 256 -- enough to convict a wrong instruction stream. Encodings per the RISC-V + ARMv8-A manuals. Known answer: every authored program, on BOTH arches, computes x*C -> exit 0.

dependencies 2 imports · 0 importers

nx_emu_rv64.nx nx_emu_arm64.nx nx_superopt_machinecode_test.n

imports: nx_emu_rv64.nxnx_emu_arm64.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main mc_puts mc_best mc_verify_alg mc_eval mc_num mc_check mc_run_rv mc_put_w rv_addi rv_slli rv_add rv_sub emu_rv64_run emu_rv64_run_mem emu_g_ld emu_rv_sext12 emu_ltu emu_srl emu_sext32 emu_g_st emu_rv_bimm emu_rv_jimm sys_read mc_run_a64 mc_put_w ↻ a64_movz a64_add_sh a64_sub_sh emu_arm64_run emu_arm64_run_mem a64e_g_ld a64e_wr a64e_rd a64e_subs a64e_ltu a64e_adds a64e_ltu ↻ a64e_shiftreg a64e_srl

structs

none

consts

none

functions

18func mc_eval(a: i64, op: i64, b: i64, x: i64) -> i64
called by 1: mc_verify_alg
22func mc_verify_alg(a: i64, op: i64, b: i64, C: i64) -> i64
called by 1: mc_best calls 1: mc_eval
29func mc_best(C: i64, out: *i64) -> i64
called by 1: main calls 1: mc_verify_alg
51func mc_put_w(code: *u8, o: i64, w: i64) -> i64
called by 2: mc_run_rvmc_run_a64
57func rv_addi(rd: i64, rs1: i64, imm: i64) -> i64 { return ((imm & 0xfff) << 20) | (rs1 << 15) | (rd << 7) | 0x13 }
called by 1: mc_run_rv
58func rv_slli(rd: i64, rs1: i64, sh: i64) -> i64 { return ((sh & 0x3f) << 20) | (rs1 << 15) | (1 << 12) | (rd << 7) | 0x13 }
called by 1: mc_run_rv
59func rv_add(rd: i64, rs1: i64, rs2: i64) -> i64 { return (rs2 << 20) | (rs1 << 15) | (rd << 7) | 0x33 }
called by 1: mc_run_rv
60func rv_sub(rd: i64, rs1: i64, rs2: i64) -> i64 { return (0x20 << 25) | (rs2 << 20) | (rs1 << 15) | (rd << 7) | 0x33 }
called by 1: mc_run_rv
61func mc_run_rv(x: i64, a: i64, op: i64, b: i64) -> i64
74func a64_movz(rd: i64, imm16: i64) -> i64 { return 0xD2800000 | ((imm16 & 0xffff) << 5) | rd }
called by 1: mc_run_a64
75func a64_add_sh(rd: i64, rn: i64, rm: i64, sh: i64) -> i64 { return 0x8B000000 | (rm << 16) | ((sh & 0x3f) << 10) | (rn << 5) | rd }
called by 1: mc_run_a64
76func a64_sub_sh(rd: i64, rn: i64, rm: i64, sh: i64) -> i64 { return 0xCB000000 | (rm << 16) | ((sh & 0x3f) << 10) | (rn << 5) | rd }
called by 1: mc_run_a64
77func mc_run_a64(x: i64, a: i64, op: i64, b: i64) -> i64
88func mc_puts(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 }
called by 1: main
89func mc_num(v: i64) -> i64
called by 1: main
99func mc_check(arch: i64, C: i64, a: i64, op: i64, b: i64) -> i64
called by 1: main calls 2: mc_run_rvmc_run_a64
111func main() -> i64