nx_wasm.nx

nx_wasm.nx F618 wasm-SIMD FLIP (2026-07-21, landed from the proven rung-1 twin nx_wasm_v128.nx). The fused v128 SAD intercept fires ONLY on calls to v128_sad16 (nx_vmotion.nx); any function without one emits byte-identical wasm. THE INTERCEPT: a call to the scalar reference fn `v128_sad16(a,b)` (nx_vmotion.nx) is emitted as an INLINE wasm-SIMD sequence (v128.load x2, sub_sat_u both ways, or -> bytewise |a-b|, extadd_pairwise u8->u16->u32, 4x extract_lane+extend+add) instead of a call. Native + stock-wat builds keep the scalar body = the bit-exact reference; this backend swaps ONLY the call sites. Exact-integer equivalence: sub_sat_u(a,b)|sub_sat_u(b,a) == |a-b| per byte (one side is 0); extadds are exact (max 16*255=4080 << u16/u32); the lane sum is the same integer as the scalar loop. The inliner is OFF by default (opt_inline_module gate) so call sites always reach this emitter. wasm.nx -- NishiLang port of wasm.c (WAT backend). Lowers our SSA IR to WebAssembly Text format. The core challenge WAT imposes is structured control flow: there are no arbitrary branches, only block/loop/if scopes with break-to-label. Our IR has free-form CFG edges, so we use the universal block-dispatch pattern (`br_table` driven by a `$target` local) that encodes any CFG at small constant cost. Per-op semantics match wasm.c exactly; every Value gets a $vN local, comparisons extend to i64 after the i32 WASM result, and constants materialize inline as i64.const. Functions are prefixed `wat_` so they don't collide with riscv.nx's asm-side `rv_*` / `emit_*` naming when both libraries are imported into a driver.