nx_x86_regalloc.nx

nx_x86_regalloc.nx -- genuine x86_64 register allocation (G1 keystone). FRESH, x86_-prefixed, self-host-isolated: re-implements the proven IDEAS of nx_regalloc.nx (Interval shape, def-to-last-use scan, mark_crosses_call, ValueLoc lowering) with ZERO shared symbols and NO `import "nx_regalloc.nx"`, because regalloc_function is on the live RISC-V self-host bootstrap host (nx_nxc.nx:139, nx_main.nx:64) that compiles the x86 compiler -- re-binding a shared name there would corrupt the host. See docs/NX_G1_X86_REGALLOC_PLAN. ALLOCATE-not-COPY: a homed value LIVES in a callee-saved GPR for its whole live range (producing op computes straight into it -- zero copy), unlike the reverted K=1 cache (movq %reg,%rbx per result, +2018 insns -> net-negative). Home pool = the 5 SysV callee-saved GPRs {r12,r13,r14,r15,rbx} (home idx 0..4) -- none used as scratch/operand/arg/clobber by the x86 backend, so they survive every CALL/SYSCALL/TAIL_CALL/clone with no save-around-call logic. FIX-12 INVARIANT: never add rcx/rdx/rbp/r10/r11 to this pool. THIS IS STEP 1b: full interval analysis (build_intervals + mark_crosses_call + single_block) RUNS over every function -- crash-tested by the self-host fixpoint over the whole corpus -- but its result is DISCARDED: every value lowers to {VL_SPILLED,-1}, mask 0, so emitted code is byte-identical to the pre-regalloc backend. Home selection + emit-path retarget land in STEP 2.