_gpu_dxg_r4g_recon.nx source

1// _gpu_dxg_r4g_recon.nx -- SOVEREIGN-GPU ladder R4g RECON: create a GPU SYNCHRONIZATION OBJECT on the 5080. 2// SUBMITCOMMAND (0x0f) forwards the command buffer UNINSPECTED to the host => needs NVIDIA GPU-ISA (the R5 3// frontier). The safe, real mechanism rung is the sync-object fabric: CREATESYNCHRONIZATIONOBJECT (0x10) + 4// SIGNAL/WAIT-from-CPU (0x31/0x3a). First: find which d3dddi_synchronizationobject_type the host accepts. 5// LX_DXCREATESYNCHRONIZATIONOBJECT = _IOWR(0x47,0x10,0x5C) = 0xC05C4710. struct d3dkmt_createsynchronizationobject2: 6// device@0; reserved@4; info@8 { type@8(enum); flags@12; union@16 (64B); shared_handle@80 }; **sync_object@84 (OUT)**. 7// Try types {1=mutex,2=semaphore,3=fence,4=cpu_notification,5=monitored_fence,9=fence2}; print ret + sync_object@84. 8// raw syscalls only. No log writes. license_tier: ORIGINAL 9import "nx_syscalls.nx" 10 11const ENUM2_CODE: i64 = 0xC0104714 12const QAI_CODE: i64 = 0xC0184709 13const OAFL_CODE: i64 = 0xC00C4701 14const CDEV_CODE: i64 = 0xC0404702 15const CSO_CODE: i64 = 0xC05C4710 16 17func p(s: *u8) -> i64 { var nn: i64=0; while s[nn]!=(0 as u8){nn=nn+1} sys_write(1,s,nn); return 0 } 18func n(v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m;sys_write(1,"-" as *u8,1)}; let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48;k=1}; while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1}; var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1}; sys_write(1,bb,k); return 0 } 19func x(v: i64) -> i64 { p("0x" as *u8); let bb:*u8=sys_mmap(20); var k:i64=0; var m:i64=v; if m==0{bb[0]=48;k=1}; while m>0{ let d:i64=m&15; if d<10{bb[k]=(48+d) as u8}else{bb[k]=(87+d) as u8}; m=(m>>4); k=k+1 } var i:i64=0; let o:*u8=sys_mmap(20); while i<k{o[i]=bb[k-1-i];i=i+1} sys_write(1,o,k); return 0 } 20func rd32(buf: *u8, off: i64) -> i64 { return (buf[off] as i64)|((buf[off+1] as i64)<<8)|((buf[off+2] as i64)<<16)|((buf[off+3] as i64)<<24) } 21func rd64(buf: *u8, off: i64) -> i64 { let q: *i64 = (buf as i64 + off) as *i64; return q[0] } 22func setu32(buf: *u8, off: i64, val: i64) -> i64 { let w: *u8 = (buf as i64 + off) as *u8; w[0]=(val&0xff) as u8; w[1]=((val>>8)&0xff) as u8; w[2]=((val>>16)&0xff) as u8; w[3]=((val>>24)&0xff) as u8; return 0 } 23 24func query_type(fd: i64, handle: i64, qtype: i64, psize: i64, outv: *i64) -> i64 { 25 let priv: *u8 = sys_mmap(64); var zz: i64 = 0; while zz < 64 { priv[zz] = 0 as u8; zz = zz + 1 } 26 let req: *u8 = sys_mmap(64); var y: i64 = 0; while y < 64 { req[y] = 0 as u8; y = y + 1 } 27 let h: *i64 = (req as i64 + 0) as *i64; h[0] = (handle & 0xffffffff) | ((qtype & 0xffffffff) << 32) 28 let pd: *i64 = (req as i64 + 8) as *i64; pd[0] = priv as i64 29 let pds: *i64 = (req as i64 + 16) as *i64; pds[0] = psize & 0xffffffff 30 let ret: i64 = sys_ioctl(fd, QAI_CODE, req as i64); outv[0] = rd32(priv, 0); return ret 31} 32func open_from_luid(fd: i64, luid_lo: i64, luid_hi: i64, outh: *i64) -> i64 { 33 let req: *u8 = sys_mmap(64); var y: i64 = 0; while y < 64 { req[y] = 0 as u8; y = y + 1 } 34 let lo: *i64 = (req as i64 + 0) as *i64; lo[0] = (luid_lo & 0xffffffff) | ((luid_hi & 0xffffffff) << 32) 35 let ret: i64 = sys_ioctl(fd, OAFL_CODE, req as i64); outh[0] = rd32(req, 8); return ret 36} 37func create_device(fd: i64, adapter: i64, outd: *i64) -> i64 { 38 let buf: *u8 = sys_mmap(512); var bz: i64 = 0; while bz < 512 { buf[bz] = 0 as u8; bz = bz + 1 } 39 setu32(buf, 0, adapter & 0xffffffff) 40 let ret: i64 = sys_ioctl(fd, CDEV_CODE, buf as i64); outd[0] = rd32(buf, 12); return ret 41} 42// create a sync object of `stype`. OUT sync_object@84 -> outso[0]. dumps union OUT slots for inspection. 43func create_so(fd: i64, device: i64, stype: i64, outso: *i64) -> i64 { 44 let buf: *u8 = sys_mmap(256); var bz: i64 = 0; while bz < 256 { buf[bz] = 0 as u8; bz = bz + 1 } 45 setu32(buf, 0, device & 0xffffffff) // device @0 46 setu32(buf, 8, stype) // info.type @8 47 let ret: i64 = sys_ioctl(fd, CSO_CODE, buf as i64) 48 outso[0] = rd32(buf, 84) // sync_object @84 49 return ret 50} 51 52func main() -> i64 { 53 p("=== R4g RECON: CREATESYNCHRONIZATIONOBJECT type sweep on the 5080 ===\n" as *u8) 54 let fd: i64 = sys_openat_rd("/dev/dxg" as *u8) 55 if fd < 0 { p("open fail\n" as *u8); sys_exit(1); return 1 } 56 let ainfo: *u8 = sys_mmap(4096); var z: i64 = 0; while z < 4096 { ainfo[z] = 0 as u8; z = z + 1 } 57 let ereq: *u8 = sys_mmap(64); ereq[0] = 8 as u8; let r8: *i64 = (ereq as i64 + 8) as *i64; r8[0] = ainfo as i64 58 sys_ioctl(fd, ENUM2_CODE, ereq as i64); let nc: i64 = rd32(ereq, 0) 59 let v: *i64 = sys_mmap(16); var disc_lo: i64 = 0; var disc_hi: i64 = 0 60 var ai: i64 = 0 61 while ai < nc { 62 let base: i64 = ai * 20; let eh: i64 = rd32(ainfo, base) 63 let qret: i64 = query_type(fd, eh, 15, 4, v); let t: i64 = v[0] 64 if qret == 0 { if ((t>>4)&1) == 1 { if ((t>>2)&1) == 0 { disc_lo = rd32(ainfo, base+4); disc_hi = rd32(ainfo, base+8) } } } 65 ai = ai + 1 66 } 67 let ah: *i64 = sys_mmap(16); open_from_luid(fd, disc_lo, disc_hi, ah) 68 let dh: *i64 = sys_mmap(16); create_device(fd, ah[0], dh); let device: i64 = dh[0] 69 p(" device=" as *u8); x(device); p("\n type -> ret : sync_object_handle\n" as *u8) 70 71 let so: *i64 = sys_mmap(16) 72 let types: *i64 = sys_mmap(64) 73 types[0]=1; types[1]=2; types[2]=3; types[3]=4; types[4]=5; types[5]=6; types[6]=9; types[7]= 0 - 1 74 var ti: i64 = 0 75 while types[ti] != (0 - 1) { 76 let st: i64 = types[ti] 77 let r: i64 = create_so(fd, device, st, so) 78 p(" type=" as *u8); n(st); p(" -> ret=" as *u8); n(r); p(" : sync_object=" as *u8); x(so[0]) 79 if r == 0 { if so[0] != 0 { p(" <== created" as *u8) } } 80 p("\n" as *u8) 81 ti = ti + 1 82 } 83 sys_close(fd) 84 p("=== R4g RECON DONE ===\n" as *u8) 85 return 0 86}