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`nx_rvc_run_suite.nx` source

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1// nx_rvc_run_suite.nx -- nishios NO3: run the published RISC-V architectural test suite on the
2// SOVEREIGN rv64im_min_sim and report the pass count PER TEST GROUP against the repo's Spike-generated
3// reference signatures.  Watch symbol: rvc_run_suite.
4//
5// THE SUBJECT is our sim (rv64im_min_sim via nx_bootcap's ONE machine composition).  The corpus is
6// third-party (riscv-non-isa/riscv-arch-test 2.7.4): the test .S sources are assembled by an
7// ORACLE/BUILD-TOOL gcc on the laptop (never on the sovereign chain) and the .reference_output
8// signatures are the repo's own Spike-generated vectors.  So this gate compares OUR execution against
9// a published third-party reference -- exactly what "architectural compliance" means.  Corpus is
10// pinned (riscv_arch_test.pin, pipe-row grammar, sha256 per file) so the population is fixed + citable.
11//
12// COMPLETION MARKER: RVMODEL_HALT writes 1 to the `tohost` symbol (a RAM word) then spins.  We poll
13// that word; when nonzero the test has signalled done.  Then we dump [begin_signature, end_signature)
14// as little-endian 32-bit words and compare, word for word, against the reference.
15//
16// VERDICTS (never one percentage; per group, partition printed and summed):
17//   PASS        completed (tohost set) AND every signature word matches
18//   FAIL        completed but a signature word differs (the sim executed something wrong)
19//   UNSUPPORTED did not complete: an illegal/unimplemented instruction halted it, or it never wrote
20//               tohost within the step budget (a hang) -- reported apart from FAIL because it is NOT
21//               "the sim computed a wrong value", it is "the sim cannot run this test".
22//
23// A memory big enough for the whole image is DERIVED from the pinned mem_end (the linker's _end), never
24// guessed: the branch tests (jal/beq/...) place their signature ~586 KB above mem_base, so the fixed
25// 64 KB boot RAM cannot hold them -- nx_bootcap.bootcap_machine_mem takes the size (one composition).
26// license_tier: ORIGINAL (the debugger/assembler/references are third-party oracles; nothing of them ships)
27
28import "nx_syscalls.nx"
29import "nx_bootcap.nx"
30
31const RVC_MEM_BASE:  i64 = 0x80000000
32const RVC_PAGE:      i64 = 4096
33const RVC_TX_CAP:    i64 = 4096          // UART tx scratch; arch-test emits no console output, this is unused headroom
34// A run bound, NAMED for its one purpose (guard a non-halting test).  The largest pinned image is
35// jal-01 (~586 KB, ~146K instruction words); each arch-test case is straight-line or a bounded loop,
36// so 8,000,000 steps is >50x the largest instruction count.  A test that has not written tohost by
37// then is looping -> reported UNSUPPORTED (STEPS-EXCEEDED), never PASS.  Announced, never silent.
38const RVC_MAX_STEPS: i64 = 8000000
39const RVC_V_PASS:    i64 = 0
40const RVC_V_FAIL:    i64 = 1
41const RVC_V_UNSUP:   i64 = 2
42// res[] slots
43const RVC_R_VERDICT: i64 = 0
44const RVC_R_MISMATCH:i64 = 1             // first differing word index, or -1
45const RVC_R_STEPS:   i64 = 2
46const RVC_R_HALTCODE:i64 = 3
47const RVC_R_DONE:    i64 = 4             // 1 if tohost was set
48const RVC_R_NWORDS:  i64 = 5
49const RVC_R_GOT:     i64 = 6             // first differing word: what the sim produced
50const RVC_R_EXP:     i64 = 7             // first differing word: what the reference holds
51const RVC_R_N:       i64 = 8
52
53func rvc_puts(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 }
54func rvc_num(v: i64) -> i64 {
  let t: *u8 = sys_mmap(32)
  var m: i64 = v
  var neg: i64 = 0
  if m < 0 { neg = 1; m = 0 - m }
  var k: i64 = 0
  if m == 0 { t[0] = 48 as u8; k = 1 }
  while m > 0 { t[k] = (48 + (m % 10)) as u8; m = m / 10; k = k + 1 }
  let o: *u8 = sys_mmap(34)
  var p: i64 = 0
  if neg == 1 { o[0] = 45 as u8; p = 1 }
  var i: i64 = 0
  while i < k { o[p] = t[k-1-i]; p = p + 1; i = i + 1 }
  sys_write(1, o, p)
  return 0
69}
70
71// print a 32-bit value as 8 lowercase hex digits (the reference file's own format)
72func rvc_hex32(v: i64) -> i64 {
  let b: *u8 = sys_mmap(8)
  var i: i64 = 0
  while i < 8 {
      let nib: i64 = (v >> ((7 - i) * 4)) & 15
      if nib < 10 { b[i] = (48 + nib) as u8 } else { b[i] = (87 + nib) as u8 }
      i = i + 1
  }
  sys_write(1, b, 8)
  return 0
82}
83
84// round v up to a multiple of m
85func rvc_roundup(v: i64, m: i64) -> i64 { return ((v + m - 1) / m) * m }
86
87// parse hex from buf starting at pos, skipping an optional 0x; stop at first non-hex. returns value; writes end pos to endp[0]
88func rvc_parse_hex(buf: *u8, pos: i64, endp: *i64) -> i64 {
  var p: i64 = pos
  if buf[p] == (48 as u8) { if buf[p+1] == (120 as u8) { p = p + 2 } }   // "0x"
  var v: i64 = 0
  var any: i64 = 0
  while 1 == 1 {
      let c: i64 = buf[p] as i64
      var d: i64 = -1
      if c >= 48 { if c <= 57 { d = c - 48 } }         // 0-9
      if c >= 97 { if c <= 102 { d = c - 87 } }        // a-f
      if c >= 65 { if c <= 70 { d = c - 55 } }         // A-F
      if d < 0 { endp[0] = p; return v }
      v = (v * 16) + d
      p = p + 1
      any = any + 1
  }
  endp[0] = p
  return v
106}
107
108// find the next '|' at or after pos, return its index (or the line-end); caller advances past it
109func rvc_next_bar(buf: *u8, pos: i64) -> i64 {
  var p: i64 = pos
  while buf[p] != (124 as u8) { if buf[p] == (10 as u8) { return p } if buf[p] == (0 as u8) { return p } p = p + 1 }
  return p
113}
114
115// copy a NUL-terminated string s into dst at off, return new off
116func rvc_cat(dst: *u8, off: i64, s: *u8) -> i64 {
  var i: i64 = 0; var p: i64 = off
  while s[i] != (0 as u8) { dst[p] = s[i]; p = p + 1; i = i + 1 }
  return p
120}
121// copy a field from buf[a..b) into dst at off, return new off
122func rvc_cat_field(dst: *u8, off: i64, buf: *u8, a: i64, b: i64) -> i64 {
  var i: i64 = a; var p: i64 = off
  while i < b { dst[p] = buf[i]; p = p + 1; i = i + 1 }
  return p
126}
127
128// THE CORE: run one test image already in memory, compare its signature to ref_words[0..nref).
129// img/ilen = the flat binary loaded at RVC_MEM_BASE; entry/begin/end/tohost are ABSOLUTE guest addrs;
130// mem_need = highest address used (linker _end) so the RAM is sized to hold it.  Fills res[RVC_R_*].
131func rvc_run_img(img: *u8, ilen: i64, entry: i64, begin: i64, endsig: i64, tohost: i64, mem_need: i64,
               ref_words: *i64, nref: i64, res: *i64) -> i64 {
  res[RVC_R_VERDICT] = RVC_V_UNSUP
  res[RVC_R_MISMATCH] = -1
  res[RVC_R_STEPS] = 0
  res[RVC_R_HALTCODE] = 0
  res[RVC_R_DONE] = 0
  let need: i64 = mem_need - RVC_MEM_BASE
  var msz: i64 = rvc_roundup(need, RVC_PAGE)
  if msz < rvc_roundup(ilen, RVC_PAGE) { msz = rvc_roundup(ilen, RVC_PAGE) }
  let tx: *u8 = sys_mmap(RVC_TX_CAP)
  let sim: *NxRv64imSim = bootcap_machine_mem(img, ilen, tx, RVC_TX_CAP, msz)
  sim.pc = entry
  var steps: i64 = 0
  var done: i64 = 0
  while steps < RVC_MAX_STEPS {
      if sim.halted == 1 { break }
      if nx_rv64im_sim_load64(sim, tohost) != 0 { done = 1; break }
      nx_rv64im_sim_step(sim)
      steps = steps + 1
  }
  res[RVC_R_STEPS] = steps
  res[RVC_R_HALTCODE] = sim.halt_code
  res[RVC_R_DONE] = done
  let nwords: i64 = (endsig - begin) / 4
  res[RVC_R_NWORDS] = nwords
  if done == 0 {
      // did not signal completion: illegal/unimplemented instruction, or step budget exhausted
      res[RVC_R_VERDICT] = RVC_V_UNSUP
      return 0
  }
  // signature-size disagreement is itself a FAIL (the sim wrote a different-length region is impossible,
  // but a bad pin would be caught here)
  var mism: i64 = -1
  var i: i64 = 0
  let n: i64 = nwords
  res[RVC_R_GOT] = 0
  res[RVC_R_EXP] = 0
  while i < n {
      let got: i64 = nx_rv64im_sim_load32(sim, begin + (i * 4)) & 0xffffffff
      var exp: i64 = 0
      if i < nref { exp = ref_words[i] & 0xffffffff }
      if got != exp { mism = i; res[RVC_R_GOT] = got; res[RVC_R_EXP] = exp; i = n } else { i = i + 1 }
  }
  if nwords != nref { if mism < 0 { mism = nwords } }
  res[RVC_R_MISMATCH] = mism
  if mism < 0 { res[RVC_R_VERDICT] = RVC_V_PASS } else { res[RVC_R_VERDICT] = RVC_V_FAIL }
  return 0
179}
180
181// parse a reference file (8-hex-per-line words) into ref_words; returns count
182func rvc_parse_ref(buf: *u8, len: i64, ref_words: *i64, cap: i64) -> i64 {
  var p: i64 = 0
  var n: i64 = 0
  let endp: *i64 = sys_mmap(8) as *i64
  while p < len {
      if buf[p] == (10 as u8) { p = p + 1 }
      else {
          // parse 8 hex digits (a word); the arch-test dumps fixed 8-char words
          let v: i64 = rvc_parse_hex(buf, p, endp)
          if n < cap { ref_words[n] = v; n = n + 1 }
          p = endp[0]
          while p < len { if buf[p] == (10 as u8) { p = p + 1; break } p = p + 1 }
      }
  }
  return n
197}
198
199// run one test named by pin fields; root = corpus dir. builds "<root>/<group>/<test>.bin" and ".ref".
200func rvc_run_one(root: *u8, group: *u8, test: *u8, entry: i64, begin: i64, endsig: i64, tohost: i64,
               mem_need: i64, res: *i64) -> i64 {
  let binp: *u8 = sys_mmap(512)
  var o: i64 = rvc_cat(binp, 0, root)
  o = rvc_cat(binp, o, "/\x00" as *u8)
  o = rvc_cat(binp, o, group)
  o = rvc_cat(binp, o, "/\x00" as *u8)
  o = rvc_cat(binp, o, test)
  let refp: *u8 = sys_mmap(512)
  var r: i64 = rvc_cat(refp, 0, binp)     // copy path-so-far
  o = rvc_cat(binp, o, ".bin\x00" as *u8)
  r = rvc_cat(refp, r, ".ref\x00" as *u8)
  let lenp: *i64 = sys_mmap(8) as *i64
  let img: *u8 = sys_read_file(binp, lenp)
  let ilen: i64 = lenp[0]
  if (img as i64) == 0 { res[RVC_R_VERDICT] = RVC_V_UNSUP; res[RVC_R_DONE] = 0; return -1 }
  let rlenp: *i64 = sys_mmap(8) as *i64
  let rbuf: *u8 = sys_read_file(refp, rlenp)
  let rlen: i64 = rlenp[0]
  if (rbuf as i64) == 0 { res[RVC_R_VERDICT] = RVC_V_UNSUP; res[RVC_R_DONE] = 0; return -1 }
  let refcap: i64 = (rlen / 2) + 16
  let ref_words: *i64 = sys_mmap(8 * refcap) as *i64
  let nref: i64 = rvc_parse_ref(rbuf, rlen, ref_words, refcap)
  rvc_run_img(img, ilen, entry, begin, endsig, tohost, mem_need, ref_words, nref, res)
  return 0
225}
226
227// group tally: per distinct group, pass/fail/unsup/total.  We iterate the pin twice: this simple model
228// prints per-test as it goes and accumulates into a small fixed set of group counters keyed by name.
229const RVC_MAXGROUPS: i64 = 16
230const RVC_GNAME_CAP: i64 = 32
231
232// suite driver: read the pin, run every row, print per-test + per-group + grand partition.  Returns
233// number of tests run (0 => empty corpus => the caller treats it as RED).
234func rvc_run_suite(pinpath: *u8, root: *u8) -> i64 {
  let lenp: *i64 = sys_mmap(8) as *i64
  let pin: *u8 = sys_read_file(pinpath, lenp)
  let plen: i64 = lenp[0]
  if (pin as i64) == 0 { rvc_puts("RVC-SUITE pin-unreadable path="); rvc_puts(pinpath); rvc_puts("\n" as *u8); return 0 }
  // group counters
  let gnames: *u8 = sys_mmap(RVC_MAXGROUPS * RVC_GNAME_CAP)
  let gpass: *i64 = sys_mmap(8 * RVC_MAXGROUPS) as *i64
  let gfail: *i64 = sys_mmap(8 * RVC_MAXGROUPS) as *i64
  let gunsup: *i64 = sys_mmap(8 * RVC_MAXGROUPS) as *i64
  let gtot: *i64 = sys_mmap(8 * RVC_MAXGROUPS) as *i64
  var ngroups: i64 = 0
  let res: *i64 = sys_mmap(8 * RVC_R_N) as *i64
  let gbuf: *u8 = sys_mmap(RVC_GNAME_CAP)
  let tbuf: *u8 = sys_mmap(RVC_GNAME_CAP * 4)
  var run: i64 = 0
  var p: i64 = 0
  let endp: *i64 = sys_mmap(8) as *i64
  while p < plen {
      // skip comment / blank lines: a row starts with "row|"
      if pin[p] == (114 as u8) {   // 'r'
          if pin[p+1] == (111 as u8) { if pin[p+2] == (119 as u8) { if pin[p+3] == (124 as u8) {
              // parse: row|group|test|entry|begin|end|tohost|mem_end|binsha|refsha
              var f: i64 = p + 4
              var b: i64 = rvc_next_bar(pin, f)
              // group
              var gi: i64 = 0
              var k: i64 = f
              while k < b { gbuf[gi] = pin[k]; gi = gi + 1; k = k + 1 }
              gbuf[gi] = 0 as u8
              f = b + 1
              b = rvc_next_bar(pin, f)
              // test
              var ti: i64 = 0
              k = f
              while k < b { tbuf[ti] = pin[k]; ti = ti + 1; k = k + 1 }
              tbuf[ti] = 0 as u8
              f = b + 1
              let entry: i64 = rvc_parse_hex(pin, f, endp); f = endp[0]; f = rvc_next_bar(pin, f) + 1
              let begin: i64 = rvc_parse_hex(pin, f, endp); f = endp[0]; f = rvc_next_bar(pin, f) + 1
              let endsig: i64 = rvc_parse_hex(pin, f, endp); f = endp[0]; f = rvc_next_bar(pin, f) + 1
              let tohost: i64 = rvc_parse_hex(pin, f, endp); f = endp[0]; f = rvc_next_bar(pin, f) + 1
              let memend: i64 = rvc_parse_hex(pin, f, endp); f = endp[0]
              rvc_run_one(root, gbuf, tbuf, entry, begin, endsig, tohost, memend, res)
              run = run + 1
              // find/insert group
              var g: i64 = 0
              var found: i64 = -1
              while g < ngroups {
                  var same: i64 = 1
                  var c: i64 = 0
                  while c < RVC_GNAME_CAP {
                      let a: i64 = gnames[g*RVC_GNAME_CAP + c] as i64
                      let bb: i64 = gbuf[c] as i64
                      if a != bb { same = 0; c = RVC_GNAME_CAP } else { if a == 0 { c = RVC_GNAME_CAP } else { c = c + 1 } }
                  }
                  if same == 1 { found = g; g = ngroups } else { g = g + 1 }
              }
              if found < 0 {
                  found = ngroups
                  var c2: i64 = 0
                  while c2 < RVC_GNAME_CAP { gnames[found*RVC_GNAME_CAP + c2] = gbuf[c2]; c2 = c2 + 1 }
                  gpass[found] = 0; gfail[found] = 0; gunsup[found] = 0; gtot[found] = 0
                  ngroups = ngroups + 1
              }
              gtot[found] = gtot[found] + 1
              let v: i64 = res[RVC_R_VERDICT]
              if v == RVC_V_PASS { gpass[found] = gpass[found] + 1 }
              if v == RVC_V_FAIL { gfail[found] = gfail[found] + 1 }
              if v == RVC_V_UNSUP { gunsup[found] = gunsup[found] + 1 }
              rvc_puts("  group=" as *u8); rvc_puts(gbuf); rvc_puts(" test=" as *u8); rvc_puts(tbuf)
              rvc_puts(" verdict=" as *u8)
              if v == RVC_V_PASS { rvc_puts("PASS" as *u8) }
              if v == RVC_V_FAIL { rvc_puts("FAIL" as *u8) }
              if v == RVC_V_UNSUP { rvc_puts("UNSUPPORTED" as *u8) }
              rvc_puts(" words=" as *u8); rvc_num(res[RVC_R_NWORDS])
              if v == RVC_V_FAIL { rvc_puts(" first_mismatch_word=" as *u8); rvc_num(res[RVC_R_MISMATCH]); rvc_puts(" got=" as *u8); rvc_hex32(res[RVC_R_GOT]); rvc_puts(" expected=" as *u8); rvc_hex32(res[RVC_R_EXP]) }
              if v == RVC_V_UNSUP { rvc_puts(" done=" as *u8); rvc_num(res[RVC_R_DONE]); rvc_puts(" halt_code=" as *u8); rvc_num(res[RVC_R_HALTCODE]); rvc_puts(" steps=" as *u8); rvc_num(res[RVC_R_STEPS]) }
              rvc_puts("\n" as *u8)
          }}}
      }
      // advance to next line
      while p < plen { if pin[p] == (10 as u8) { p = p + 1; break } p = p + 1 }
  }
  // per-group summary + grand partition
  rvc_puts("\n" as *u8)
  var tp: i64 = 0; var tf: i64 = 0; var tu: i64 = 0; var tt: i64 = 0
  var g2: i64 = 0
  while g2 < ngroups {
      rvc_puts("GROUP " as *u8)
      rvc_puts((gnames + (g2*RVC_GNAME_CAP)))
      rvc_puts(" pass=" as *u8); rvc_num(gpass[g2])
      rvc_puts(" fail=" as *u8); rvc_num(gfail[g2])
      rvc_puts(" unsupported=" as *u8); rvc_num(gunsup[g2])
      rvc_puts(" total=" as *u8); rvc_num(gtot[g2])
      rvc_puts(" (pass+fail+unsup=" as *u8); rvc_num(gpass[g2]+gfail[g2]+gunsup[g2]); rvc_puts(")\n" as *u8)
      tp = tp + gpass[g2]; tf = tf + gfail[g2]; tu = tu + gunsup[g2]; tt = tt + gtot[g2]
      g2 = g2 + 1
  }
  rvc_puts("SUITE pass=" as *u8); rvc_num(tp)
  rvc_puts(" fail=" as *u8); rvc_num(tf)
  rvc_puts(" unsupported=" as *u8); rvc_num(tu)
  rvc_puts(" total=" as *u8); rvc_num(tt)
  rvc_puts(" partition_ok=" as *u8)
  if (tp + tf + tu) == tt { rvc_puts("1" as *u8) } else { rvc_puts("0" as *u8) }
  rvc_puts(" groups=" as *u8); rvc_num(ngroups)
  rvc_puts("\n" as *u8)
  return run
342}
343
344// ---- SELFTEST: a self-contained synthetic RV64 program proving the runner's mechanism WITHOUT the
345// third-party corpus, so the gate is non-vacuous on the NAS (no gcc there).  The program stores two
346// known words to a signature region, writes 1 to tohost, then loops.  Hand-encoded RV64 (verified by
347// running it: if an encoding is wrong the good case does not PASS).
348func rvc_st_wr32(buf: *u8, off: i64, w: i64) -> i64 {
  buf[off]   = (w & 0xff) as u8
  buf[off+1] = ((w >> 8) & 0xff) as u8
  buf[off+2] = ((w >> 16) & 0xff) as u8
  buf[off+3] = ((w >> 24) & 0xff) as u8
  return 0
354}
355
356// build the synthetic image into buf (>= 0x210 bytes); returns image length.  first_illegal!=0 replaces
357// the first instruction with an illegal word to exercise the UNSUPPORTED path.
358func rvc_st_build(buf: *u8, first_illegal: i64) -> i64 {
  var i: i64 = 0
  while i < 0x210 { buf[i] = 0 as u8; i = i + 1 }
  // code at 0x00 (guest 0x80000000)
  rvc_st_wr32(buf, 0,  0x00000317)   // auipc x6, 0        -> x6 = pc = 0x80000000
  rvc_st_wr32(buf, 4,  0x01100393)   // addi  x7, x0, 0x11
  rvc_st_wr32(buf, 8,  0x10732023)   // sw    x7, 0x100(x6) -> sig[0] = 0x11
  rvc_st_wr32(buf, 12, 0x02200393)   // addi  x7, x0, 0x22
  rvc_st_wr32(buf, 16, 0x10732223)   // sw    x7, 0x104(x6) -> sig[1] = 0x22
  rvc_st_wr32(buf, 20, 0x00100393)   // addi  x7, x0, 1
  rvc_st_wr32(buf, 24, 0x20732023)   // sw    x7, 0x200(x6) -> tohost = 1
  rvc_st_wr32(buf, 28, 0x0000006f)   // jal   x0, 0         -> loop forever
  if first_illegal != 0 { rvc_st_wr32(buf, 0, 0xffffffff) }   // an illegal encoding halts the sim
  return 0x210
372}
373
374func rvc_selftest() -> i64 {
  let img: *u8 = sys_mmap(0x1000)
  let res: *i64 = sys_mmap(8 * RVC_R_N) as *i64
  let entry: i64 = 0x80000000
  let begin: i64 = 0x80000100
  let endsig: i64 = 0x80000108        // 2 words
  let tohost: i64 = 0x80000200
  let memend: i64 = 0x80001000
  // good reference
  let refg: *i64 = sys_mmap(16) as *i64
  refg[0] = 0x11; refg[1] = 0x22
  // corrupt reference (second word wrong)
  let refc: *i64 = sys_mmap(16) as *i64
  refc[0] = 0x11; refc[1] = 0x99
388
  rvc_st_build(img, 0)
  rvc_run_img(img, 0x210, entry, begin, endsig, tohost, memend, refg, 2, res)
  let good_v: i64 = res[RVC_R_VERDICT]
  let good_done: i64 = res[RVC_R_DONE]
393
  rvc_st_build(img, 0)
  rvc_run_img(img, 0x210, entry, begin, endsig, tohost, memend, refc, 2, res)
  let corrupt_v: i64 = res[RVC_R_VERDICT]
  let corrupt_mism: i64 = res[RVC_R_MISMATCH]
398
  rvc_st_build(img, 1)
  rvc_run_img(img, 0x210, entry, begin, endsig, tohost, memend, refg, 2, res)
  let illegal_v: i64 = res[RVC_R_VERDICT]
  let illegal_done: i64 = res[RVC_R_DONE]
403
  // empty suite -> a nonexistent pin returns 0 runs (RED at the caller)
  let empty_run: i64 = rvc_run_suite("/tmp/nx_rvc_gate/nonexistent.pin\x00" as *u8, "/tmp/nx_rvc_gate\x00" as *u8)
406
  rvc_puts("RVC-SELFTEST good_verdict=" as *u8); rvc_num(good_v); rvc_puts(" good_done=" as *u8); rvc_num(good_done); rvc_puts("\n" as *u8)
  rvc_puts("RVC-SELFTEST corrupt_verdict=" as *u8); rvc_num(corrupt_v); rvc_puts(" corrupt_mismatch_word=" as *u8); rvc_num(corrupt_mism); rvc_puts("\n" as *u8)
  rvc_puts("RVC-SELFTEST illegal_verdict=" as *u8); rvc_num(illegal_v); rvc_puts(" illegal_done=" as *u8); rvc_num(illegal_done); rvc_puts("\n" as *u8)
  rvc_puts("RVC-SELFTEST empty_suite_runs=" as *u8); rvc_num(empty_run); rvc_puts("\n" as *u8)
  // internal aggregate verdict: good PASS(0), corrupt FAIL(1), illegal UNSUP(2), empty 0 runs
  var ok: i64 = 1
  if good_v != RVC_V_PASS { ok = 0 }
  if good_done != 1 { ok = 0 }
  if corrupt_v != RVC_V_FAIL { ok = 0 }
  if illegal_v != RVC_V_UNSUP { ok = 0 }
  if empty_run != 0 { ok = 0 }
  rvc_puts("RVC-SELFTEST verdict=" as *u8)
  if ok == 1 { rvc_puts("GREEN\n" as *u8) } else { rvc_puts("RED\n" as *u8) }
  if ok == 1 { return 0 }
  return 1
422}
423
424// rvc_run_suite is the watch symbol; this predicate names it for absence probes and keeps a live ref.
425func rvc_run_suite_live() -> i64 { return RVC_V_PASS }
426
427func main(argc: i64, argv: *i64) -> i64 {
  if argc >= 2 {
      let a: *u8 = argv[1] as *u8
      // "selftest" (a[1]='e') vs "suite" (a[1]='u'): dispatch on the second char
      if a[0] == (115 as u8) { if a[1] == (101 as u8) { return rvc_selftest() } }
  }
  // suite mode: nx_rvc_run_suite suite <pin> <root>   (or default pin+root)
  var pin: *u8 = "bench/riscv-arch-test/riscv_arch_test.pin\x00" as *u8
  var root: *u8 = "bench/riscv-arch-test\x00" as *u8
  if argc >= 3 { pin = argv[2] as *u8 }
  if argc >= 4 { root = argv[3] as *u8 }
  rvc_puts("=== nx_rvc_run_suite -- RISC-V architectural compliance on rv64im_min_sim (pin=" as *u8)
  rvc_puts(pin); rvc_puts(")\n\n" as *u8)
  let run: i64 = rvc_run_suite(pin, root)
  if run == 0 { rvc_puts("SUITE empty-corpus verdict=RED\n" as *u8); return 1 }
  return 0
443}
nx_rvc_run_suite.nx source

`nx_rvc_run_suite.nx` source
