code wiki / _hdl_build / _f64_atan_gate_authored.nx
_f64_atan_gate_authored.nx
buildroot/runtime/_hdl_build/_f64_atan_gate_authored.nx
about
_f64_atan_gate_authored.nx -- ME1 atan gate: TEAM-AUTHORED kernel (_pe_f64atan,
MATH_KERNEL/ATAN emitter) vs the LIVE sovereign bigfloat oracle
(nx_bigfloat120_atan -- self-anchored, no python). Pure Nishi end to end.
TOTAL DOMAIN: fixed edges (anchor points, fold seam at 41/16, subnormals,
huge, specials) + 300 banded xorshift points over the full exponent range.
ULP via the signed ordered map. GREEN iff max ULP <= 1.
Markers: ATBAD x= exp= got= ulp= / ATAN-ULP ... / ATAN-GATE verdict=GREEN|RED
dependencies 9 imports · 0 importers
imports: nx_syscalls.nxnx_f64.nxnx_f64_div.nxnx_f64_cvt.nxnx_bigfloat120.nxnx_bigfloat120_div.nxnx_bigfloat120_trig.nxnx_bigfloat120_atan.nx_pe_f64atan.nx
imported by: nobody (leaf or entry point)
call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown
structs
| none |
consts
| none |
functions
| 19 | func atg_puts(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 } |
| 20 | func atg_putn(v: i64) -> i64 { let bb: *u8 = sys_mmap(28); var m: i64 = v; if m < 0 { m = 0 - m; sys_write(1, "-" as *u8, 1) }; let t: *u8 = sys_mmap(28); var k: i64 = 0; if m == 0 { t[0] = 48; k = 1 }; while m > 0 { t[k] = 48 + (m % 10); m = m / 10; k = k + 1 }; var i: i64 = 0; while i < k { bb[i] = t[k-1-i]; i = i + 1 }; sys_write(1, bb, k); return 0 } |
| 21 | func atg_puthex(v: i64) -> i64 { let bb: *u8 = sys_mmap(20); var i: i64 = 0; while i < 16 { let nib: i64 = (v >> ((15 - i) * 4)) & 15; if nib < 10 { bb[i] = 48 + nib } else { bb[i] = 55 + nib } i = i + 1 } sys_write(1, bb, 16); return 0 } |
| 23 | func atg_rng(state: *i64) -> i64 called by 1: main |
| 32 | func atg_ord(v: i64) -> i64 called by 1: atg_ulp |
| 37 | func atg_ulp(got: i64, want: i64) -> i64 |
| 44 | func main() -> i64 |