code wiki / _hdl_build / _f64_pow_gate_authored.nx

_f64_pow_gate_authored.nx

buildroot/runtime/_hdl_build/_f64_pow_gate_authored.nx

8104 B200 linesdepth 7pulls 12 transitivereach 0 importersview sourcekind tooltopic f64
docsdependenciesstructsconstsfunctions

about

_f64_pow_gate_authored.nx -- ME1 pow gate: dd kernel (_pe_f64pow) vs the LIVE sovereign bigfloat pow oracle (nx_bigfloat120_pow). Pure Nishi end to end. 2D banded pairs across the hard regions: x near 1 with amplifying y (the double-double stress case), the overflow seam (z ~ 1024) and the subnormal/ underflow seam (z ~ -1074), integer-y parity paths with negative x, subnormal x, generic mid-range, and the IEEE special matrix. ULP via the signed ordered map. GREEN iff max ULP <= 1. Markers: PWBAD x= y= exp= got= ulp= / POW-ULP ... / POW-GATE verdict=

dependencies 11 imports · 0 importers

nx_syscalls.nx nx_f64.nx nx_f64_div.nx nx_f64_cvt.nx nx_bigfloat120.nx nx_bigfloat120_div.nx nx_bigfloat120_exp.nx nx_bigfloat120_ln.nx nx_bigfloat120_pow.nx _pm_pow_spec.nx _f64_pow_gate_authored.nx

diagram shows first 10 each side; +1 more imports, +0 more importers in the complete lists below.

imports: nx_syscalls.nxnx_f64.nxnx_f64_div.nxnx_f64_cvt.nxnx_bigfloat120.nxnx_bigfloat120_div.nxnx_bigfloat120_exp.nxnx_bigfloat120_ln.nxnx_bigfloat120_pow.nx_pm_pow_spec.nx_pe_f64pow.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main sys_mmap pwg_rng nx_i64_to_f64 _f64_round_pack bf_pow_f64 pw_int_class bf_new sys_mmap ↻ bfp_ln_big bf_sqrt2_cut bf_new ↻ bf_set_int bf_cmp bf_is_zero bf_sub bf_is_zero ↻ bf_copy sys_mmap ↻ bf_shr2 bf_norm bf_add bf_is_zero ↻ bf_copy ↻ sys_mmap ↻ bf_shr2 ↻ bf_norm ↻ bf_div bf_is_zero ↻ bf_copy ↻ bf_norm ↻ bf_mul bf_is_zero ↻ bf_copy ↻ sys_mmap ↻ bf_copy ↻ bf_div_small bf_is_zero ↻ bf_copy ↻ bf_norm ↻

structs

none

consts

none

functions

22func pwg_puts(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 }
called by 1: main calls 1: sys_write
23func pwg_putn(v: i64) -> i64 { let bb: *u8 = sys_mmap(28); var m: i64 = v; if m < 0 { m = 0 - m; sys_write(1, "-" as *u8, 1) }; let t: *u8 = sys_mmap(28); var k: i64 = 0; if m == 0 { t[0] = 48; k = 1 }; while m > 0 { t[k] = 48 + (m % 10); m = m / 10; k = k + 1 }; var i: i64 = 0; while i < k { bb[i] = t[k-1-i]; i = i + 1 }; sys_write(1, bb, k); return 0 }
called by 1: main calls 2: sys_mmapsys_write
24func pwg_puthex(v: i64) -> i64 { let bb: *u8 = sys_mmap(20); var i: i64 = 0; while i < 16 { let nib: i64 = (v >> ((15 - i) * 4)) & 15; if nib < 10 { bb[i] = 48 + nib } else { bb[i] = 55 + nib } i = i + 1 } sys_write(1, bb, 16); return 0 }
called by 1: main calls 2: sys_mmapsys_write
26func pwg_rng(state: *i64) -> i64
called by 1: main
35func pwg_ord(v: i64) -> i64
called by 1: pwg_ulp
40func pwg_ulp(got: i64, want: i64) -> i64
called by 1: main calls 1: pwg_ord
47func main() -> i64