code wiki / _hdl_build / _f64_sinhcosh_gate_authored.nx
_f64_sinhcosh_gate_authored.nx
buildroot/runtime/_hdl_build/_f64_sinhcosh_gate_authored.nx
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_f64_sinhcosh_gate_authored.nx -- ME1 sinh/cosh gate: dd kernels
(_pe_f64sinhcosh) vs the LIVE sovereign bigfloat oracle. Pure Nishi.
Edges: Taylor/exp seam at 1, I-drop seam at 28, overflow boundary
(710.0 / ln(2^1025) / 710.5), tiny/subnormal; bands across (0,1), [1,28),
[28,710]. GREEN iff max ULP <= 1 on BOTH functions.
Markers: SHBAD/CHBAD x= exp= got= ulp= / SINH-ULP / COSH-ULP / verdict=
dependencies 12 imports · 0 importers
diagram shows first 10 each side; +2 more imports, +0 more importers in the complete lists below.
imports: nx_syscalls.nxnx_f64.nxnx_f64_div.nxnx_f64_cvt.nxnx_bigfloat120.nxnx_bigfloat120_div.nxnx_bigfloat120_exp.nxnx_bigfloat120_ln.nxnx_bigfloat120_pow.nxnx_bigfloat120_sinh.nx_pm_sinhcosh_spec.nx_pe_f64sinhcosh.nx
imported by: nobody (leaf or entry point)
call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown
structs
| none |
consts
| none |
functions
| 21 | func shg_puts(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 } |
| 22 | func shg_putn(v: i64) -> i64 { let bb: *u8 = sys_mmap(28); var m: i64 = v; if m < 0 { m = 0 - m; sys_write(1, "-" as *u8, 1) }; let t: *u8 = sys_mmap(28); var k: i64 = 0; if m == 0 { t[0] = 48; k = 1 }; while m > 0 { t[k] = 48 + (m % 10); m = m / 10; k = k + 1 }; var i: i64 = 0; while i < k { bb[i] = t[k-1-i]; i = i + 1 }; sys_write(1, bb, k); return 0 } |
| 23 | func shg_puthex(v: i64) -> i64 { let bb: *u8 = sys_mmap(20); var i: i64 = 0; while i < 16 { let nib: i64 = (v >> ((15 - i) * 4)) & 15; if nib < 10 { bb[i] = 48 + nib } else { bb[i] = 55 + nib } i = i + 1 } sys_write(1, bb, 16); return 0 } |
| 25 | func shg_rng(state: *i64) -> i64 called by 1: main |
| 34 | func shg_ord(v: i64) -> i64 called by 1: shg_ulp |
| 39 | func shg_ulp(got: i64, want: i64) -> i64 |
| 46 | func main() -> i64 |