code wiki / _hdl_build / _gpu_bm_copy_gate.nx

_gpu_bm_copy_gate.nx

buildroot/runtime/_hdl_build/_gpu_bm_copy_gate.nx

10103 B128 linesdepth 2pulls 2 transitivereach 0 importersview sourcekind gate/prooftopic gpu
docsdependenciesstructsconstsfunctions

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_gpu_bm_copy_gate.nx -- BARE-METAL SOVEREIGN-GPU rung BM-GPU-CE1: Copy Engine (DMA) through the sovereign GPFIFO. Adds a SECOND real engine class: NVC6B5 (AMPERE_DMA_COPY_A) -- GPU memcpy, the data-movement primitive (H2D/D2H/D2D). NVC56F SET_OBJECT (faithful) binds the copy class to a subchannel; the FAITHFUL NVC6B5 methods (offsets verified vs open spec: OFFSET_IN_UPPER@0x400/LOWER@0x404, OFFSET_OUT_UPPER@0x408/LOWER@0x40C, LINE_LENGTH_IN@0x418, LINE_COUNT@0x41C, LAUNCH_DMA@0x300 with DATA_TRANSFER_TYPE 1:0 [NONE=0/PIPELINED=1/NON_PIPELINED=2]) drive the modeled copy engine: LAUNCH_DMA with type!=NONE copies LINE_LENGTH_IN*LINE_COUNT bytes src->dst. NISHI-ECOSYSTEM-ONLY: our model+driver; NVC6B5 method encoding = last-mile hardware spec (VERIFIED, faithful). HONEST SCOPE: copy-DISPATCH+result LOGIC vs spec model; real copy-engine on real silicon = BM-GPU-6. GREEN iff: after dispatch dst == src over the copied range AND bytes beyond are untouched; tampers (LAUNCH_DMA type=NONE / no SET_OBJECT) leave dst unwritten. Marker -> knowledge/status/gpu_baremetal.log (BMCOPYGATE). license_tier: ORIGINAL

dependencies 1 imports · 0 importers

nx_syscalls.nx _gpu_bm_copy_gate.nx

imports: nx_syscalls.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main p sys_write sys_mmap emit_hdr wr32 wr32 ↻ gpfifo_run_copy rd32 x p ↻ sys_mmap ↻ sys_write ↻ n sys_mmap ↻ sys_write ↻ sys_openat_append fp sys_write ↻ sys_close sys_exit

structs

none

consts

16const DMA_COPY_CLASS: i64 = 0xC6B5 // AMPERE_DMA_COPY_A (NVC6B5)
17const NBYTES: i64 = 256

functions

19func p(s: *u8) -> i64 { var nn: i64=0; while s[nn]!=(0 as u8){nn=nn+1} sys_write(1,s,nn); return 0 }
called by 2: xmain calls 1: sys_write
20func fp(fd: i64, s: *u8) -> i64 { var nn: i64=0; while s[nn]!=(0 as u8){nn=nn+1} sys_write(fd,s,nn); return 0 }
called by 2: fxmain calls 1: sys_write
21func n(v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m;sys_write(1,"-" as *u8,1)}; let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48;k=1}; while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1}; var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1}; sys_write(1,bb,k); return 0 }
called by 1: main calls 2: sys_mmapsys_write
22func x(v: i64) -> i64 { p("0x" as *u8); let bb:*u8=sys_mmap(20); var k:i64=0; var m:i64=v; if m==0{bb[0]=48;k=1}; while m>0{ let d:i64=m&15; if d<10{bb[k]=(48+d) as u8}else{bb[k]=(87+d) as u8}; m=(m>>4); k=k+1 } var i:i64=0; let o:*u8=sys_mmap(20); while i<k{o[i]=bb[k-1-i];i=i+1} sys_write(1,o,k); return 0 }
called by 1: main calls 3: psys_mmapsys_write
23func fx(fd: i64, v: i64) -> i64 { let bb:*u8=sys_mmap(20); var k:i64=0; var m:i64=v; if m==0{bb[0]=48;k=1}; while m>0{ let d:i64=m&15; if d<10{bb[k]=(48+d) as u8}else{bb[k]=(87+d) as u8}; m=(m>>4); k=k+1 } let o:*u8=sys_mmap(20); var i:i64=0; while i<k{o[i]=bb[k-1-i];i=i+1} fp(fd,"0x" as *u8); sys_write(fd,o,k); return 0 }
24func rd32(b: *u8, o: i64) -> i64 { return (b[o] as i64)|((b[o+1] as i64)<<8)|((b[o+2] as i64)<<16)|((b[o+3] as i64)<<24) }
called by 1: gpfifo_run_copy
25func wr32(b: *u8, o: i64, v: i64) -> i64 { b[o]=(v&0xff) as u8; b[o+1]=((v>>8)&0xff) as u8; b[o+2]=((v>>16)&0xff) as u8; b[o+3]=((v>>24)&0xff) as u8; return 0 }
called by 2: emit_hdrmain
29func gpfifo_run_copy(gmem: *u8, pb_off: i64, pb_dwords: i64, cs: *i64) -> i64
called by 1: main calls 1: rd32
58func emit_hdr(gmem: *u8, off: i64, mode: i64, count: i64, subch: i64, method: i64) -> i64
called by 1: main calls 1: wr32
62func main() -> i64