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nx_amd_pm4_gate.nx

buildroot/runtime/_hdl_build/nx_amd_pm4_gate.nx

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nx_amd_pm4_gate.nx -- gate for the sovereign AMD PM4 command-submission encoder (nx_pm4_asm) = the AMD R1 rung. Verifies the PM4 Type-3 packet headers our encoder produces against the documented AMD format for the real IT opcodes tinygrad's AM driver submits (DISPATCH/SET_SH_REG/ACQUIRE_MEM/RELEASE_MEM/WAIT_REG_MEM). HONEST SCOPE: spec-faithful (documented PM4 Type-3 + tinygrad-cross-referenced), NOT yet toolchain-bit-exact (needs llvm-mc -triple=amdgcn / ROCm). No hw writes (Rule 26). expect_exit: 0 license_tier: ORIGINAL

dependencies 2 imports · 0 importers

imports: nx_syscalls.nxnx_pm4_asm.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

structs

none

consts

none

functions

9	func bp(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 } called by 3: bx chk main calls 1: sys_write
10	func bx(v: i64) -> i64 { bp("0x" as u8); let bb:u8=sys_mmap(20); var k:i64=0; var m:i64=v; if m==0{bb[0]=48 as u8;k=1} while m>0{ let d:i64=m&15; if d<10{bb[k]=(48+d) as u8}else{bb[k]=(87+d) as u8}; m=(m>>4); k=k+1 } var i:i64=0; let o:*u8=sys_mmap(20); while i<k{o[i]=bb[k-1-i];i=i+1} sys_write(1,o,k); return 0 } called by 1: chk calls 3: bp sys_mmap sys_write
11	func bd(v: i64) -> i64 { let p: *u8=sys_mmap(1); p[0]=(48+v) as u8; sys_write(1,p,1); return 0 } called by 1: main calls 2: sys_mmap sys_write
13	func chk(name: u8, got: i64, ref: i64, st: i64) -> i64 called by 1: main calls 2: bp bx
19	func main() -> i64 calls 6: bp sys_mmap chk pm4_packet3 bd sys_exit