code wiki / _hdl_build / nx_pm4_asm.nx
nx_pm4_asm.nx
buildroot/runtime/_hdl_build/nx_pm4_asm.nx
about
nx_pm4_asm.nx -- sovereign AMD PM4 (GCN/CDNA/RDNA) COMMAND-SUBMISSION encoder = the AMD R1 rung of the
"S-class exceed for ANY DEVICE" ladder (the AMD analog of NVIDIA's GPFIFO entry). Second vendor backend.
PM4 Type-3 packet header (documented AMD PM4 spec, cross-referenced vs tinygrad ops_amd.py which submits
`self.pm4.PACKET3(cmd, len(vals)-1)` packets straight to the MEC -- bypassing the MES scheduler firmware =
the MOST-sovereign GPU path per deep-research):
header = (3<<30) | (count<<16) | (opcode<<8) ; count = number of body DWORDs minus 1
IT opcodes below are the stable AMD PM4 values (GFX9-11), used by tinygrad's AM userspace driver.
HONEST SCOPE: spec-faithful per the documented AMD PM4 Type-3 format + tinygrad-cross-referenced; toolchain
bit-exact verification (llvm-mc -triple=amdgcn, or ROCm) is the UPGRADE (no AMD assembler on this box yet).
Pure funcs, no main. license_tier: ORIGINAL
dependencies 1 imports · 3 importers
imports: nx_syscalls.nx
imported by: nx_amd_pm4_gate.nxnx_kfd.nxnx_kfd_gate.nx
structs
| none |
consts
| 14 | const PM4_IT_DISPATCH_DIRECT: i64 = 0x15 |
| 15 | const PM4_IT_WAIT_REG_MEM: i64 = 0x3c |
| 16 | const PM4_IT_RELEASE_MEM: i64 = 0x49 |
| 17 | const PM4_IT_ACQUIRE_MEM: i64 = 0x58 |
| 18 | const PM4_IT_SET_SH_REG: i64 = 0x76 |
| 19 | const PM4_IT_SET_UCONFIG_REG: i64 = 0x79 |
functions
| 22 | func pm4_packet3(opcode: i64, count: i64) -> i64 { return (3 << 30) | ((count & 0x3fff) << 16) | ((opcode & 0xff) << 8) } |