nx_cpuid.nx

nx_cpuid.nx -- THE R0 PRIMITIVE: what silicon are we actually on, and which code path may dispatch? WHY THIS IS RUNG ZERO: nx_prim_gap reported cpu-feature-detect MISSING across all 256 registry primitives. Without it NO organ can adapt to the machine it runs on, so no future hardware purchase is visible to the ecosystem and every SIMD/prefetch/cache rung above is unbuildable. It is literally the first bit up. ★THE GAP WAS DISCOVERY, NOT CAPABILITY: runtime/nx_cpu_features.nx already ran REAL cpuid via the __cpuid_ebx intrinsic -- but exposed 3 bits (BMI2/ADX) out of a register that also carries AVX2, the whole AVX-512 family, SHA, BMI1, RDSEED and CLFLUSHOPT, and it was registered nowhere. The data was fetched and thrown away. LAW: a capability no registry can see is indistinguishable from one that does not exist. TRIANGULATION IS THE POINT (evidence law): every bit is read TWICE from independent sources -- our own cpuid(7,0):EBX, and the kernel's own decode in /proc/cpuinfo. Agreement is evidence; a DISAGREEMENT is reported as a defect and drives the exit code, never averaged or hidden. If our bit map is wrong we want to fail loudly here, not silently dispatch an AVX-512 kernel onto a Zen 1. Exit code = number of disagreements. 0 = both sources agree on every probed feature. license_tier: ORIGINAL Read-only. No hw writes (Rule 26). expect_exit: 0