code wiki / _hdl_build / nx_cpuid_gate.nx

nx_cpuid_gate.nx

buildroot/runtime/_hdl_build/nx_cpuid_gate.nx

6227 B101 linesdepth 3pulls 4 transitivereach 0 importersview sourcekind gate/proof
docsdependenciesstructsconstsfunctions

about

nx_cpuid_gate.nx -- proves the cpuid(7,0):EBX decode, including features THIS BOX DOES NOT HAVE. The load-bearing cells are T7/T8: they decode AVX-512 correctly on a V1500B (Zen 1, NO AVX-512) by feeding synthetic registers. A feature detector that can only be tested on silicon you already own is worthless for the exact question it exists to answer -- 'will the next machine be faster'. Every policy cell is a gv_bite (fires on bad, silent on good). license_tier: ORIGINAL expect_exit: 0

dependencies 2 imports · 0 importers

nx_cpuid_lib.nx nx_gate_verdict.nx nx_cpuid_gate.nx

imports: nx_cpuid_lib.nxnx_gate_verdict.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main gv_ctr sys_mmap gv_head gv_puts sys_write gv_check gv_puts ↻ cg_eq cf_avx2 cf_bit cf_bmi2 cf_bit ↻ cf_sha cf_bit ↻ cf_avx512f cf_bit ↻ gv_bite gv_puts ↻ cf_simd_tier cf_avx2 ↻ cf_avx512f ↻ cf_avx512dq cf_bit ↻ cf_avx512cd cf_bit ↻ cf_avx512bw cf_bit ↻ cf_avx512vl cf_bit ↻ cf_adx cf_bit ↻ cf_bit ↻ cg_cpy cf_flag cf_isdelim cf_cache_line cf_logical_procs gv_verdict gv_puts ↻

structs

none

consts

10const CG_BUF: i64 = 512
11const CG_ALL_ONES: i64 = 4294967295
12const CG_ONLY_AVX2: i64 = 32
13const CG_ONLY_AVX512F: i64 = 65536
17const CG_V1500B_SHAPED: i64 = 547094953

functions

19func cg_cpy(d: *u8, s: *u8) -> i64
called by 1: main
25func cg_eq(a: i64, b: i64) -> i64 { if a == b { return 1 } return 0 }
called by 1: main
27func main() -> i64
calls 21: gv_ctrgv_headgv_checkcg_eqcf_avx2cf_bmi2+15