nx_emu_sparc64.nx
buildroot/runtime/nx_emu_sparc64.nx
about
nx_emu_sparc64.nx -- sovereign SPARC V9 (sparc64) interpreter (NX-EMU).
Fourth architecture, the hardest: REGISTER WINDOWS + DELAY SLOTS +
BIG-ENDIAN. Decode/execute is pure NishiLang per the SPARC V9 ISA
(the spec is the oracle) -- NO qemu. qemu-sparc64 is only the
differential BENCHMARK that must agree. This is how Nishi CARRIES
sparc64 execution (operator: "nishi ecosystem must carry; externals
= benchmarks only").
Register model: 8 globals g[0..7] (g0 == 0); a window file win[16*NWIN]
with the standard overlap (%o of window W == %i of window W+1) selected
by CWP. reg field 0..7=%g, 8..15=%o, 16..23=%l, 24..31=%i. save = CWP+1
(compute in old window, write rd in new), restore = CWP-1. Control
transfers (CALL/JMPL) take effect after the delay-slot instruction via
the PC/nPC model. Linux/SPARC syscalls: g1=number, o0..=args, `ta` traps.
genealogy_id: sparc_v9_isa + linux_sparc64_abi
lineage_id: nishi_nx_emu_sparc64_m1
license_tier: ORIGINAL
dependencies 1 imports · 1 importers
imports: nx_syscalls_x86_64.nx
imported by: nx_emu_sparc64_main.nx
structs
| none |
consts
| 21 | const SP_MAGIC_200000000: i64 = 200000000 |
| 23 | const SP_GUEST_SIZE: i64 = 16777216 |
| 24 | const SP_NWIN: i64 = 8 |
| 25 | const SP_SYS_EXIT: i64 = 1 |
| 26 | const SP_SYS_READ: i64 = 3 |
| 27 | const SP_SYS_WRITE: i64 = 4 |
| 28 | const SPE_UNSUPPORTED: i64 = -1 |
| 29 | const SPE_FAULT: i64 = -3 |
functions
| 32 | func sp_g_ld(mem: *u8, va: i64, width: i64) -> i64 |
| 38 | func sp_g_st(mem: *u8, va: i64, width: i64, val: i64) -> i64 called by 1: emu_sparc64_run_mem |
| 46 | func sp_rd(g: *i64, win: *i64, cwp: i64, r: i64) -> i64 called by 1: emu_sparc64_run_mem |
| 53 | func sp_wr(g: *i64, win: *i64, cwp: i64, r: i64, v: i64) -> i64 called by 1: emu_sparc64_run_mem |
| 62 | func emu_sparc64_run_mem(mem: *u8, mem_size: i64, entry: i64, sp0: i64) -> i64 |
| 173 | func emu_sparc64_load_elf(buf: *u8, len: i64) -> i64 |