code wiki / _hdl_build / nx_f64_exp_register.nx

nx_f64_exp_register.nx

buildroot/runtime/_hdl_build/nx_f64_exp_register.nx

2557 B41 linesdepth 4pulls 7 transitivereach 0 importersview sourcekind tooltopic f64
docsdependenciesstructsconstsfunctions

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nx_f64_exp_register.nx -- registers ME1 rung 1 (binary64 exp) via the Librarian (cl_next_idx allocation + dual-write). ENGINEER evidence = BOTH gates re-run here: the f64 core regression gate (cvt grew to_i64/ldexp this rung) AND the exp ULP gate. license_tier: ORIGINAL

dependencies 3 imports · 0 importers

nx_cap_register.nx nx_capreg_librarian.nx nx_syscalls.nx nx_f64_exp_register.nx

imports: nx_cap_register.nxnx_capreg_librarian.nxnx_syscalls.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main f6er_run sys_fork sys_openat_wr sys_dup3 sys_mmap nxa_die sys_write sys_exit nxa_lock_take nxa_lock_addr sys_write ↻ nxa_lock_give nxa_lock_addr ↻ nxa_report_overrun sys_write ↻ nxa_dump_printable sys_write ↻ nxa_dump_sizes sys_write ↻ sys_execve sys_exit ↻ sys_wait4 cr_w sys_write ↻ cr_wn sys_mmap ↻ sys_write ↻ ig_engineer ig_decision ig_council sys_exit ↻ cr_can_register sml_check_cap sml_layer_valid sml_status_valid cl_next_idx cl_max_idx sys_mmap ↻ sys_read_file

structs

none

consts

none

functions

9func f6er_run(path: *u8) -> i64
called by 1: main calls 7: sys_forksys_openat_wrsys_dup3sys_mmapsys_execvesys_exit+1
23func main() -> i64
calls 10: f6er_runcr_wcr_wnig_engineerig_decisionig_council+4