nx_gpu_graphics_gate.nx

nx_gpu_graphics_gate.nx -- GOAL-GPU-NATIVE rung-2: a GRAPHICS engine on the sovereign GPFIFO pipeline. Synthesis the operator asked for -- hardware rung up + game ecosystem + consume/produce, all sovereign. Builds on the RESEARCHED NVIDIA command model embodied in the BM-GPU organs (GF100 method-header decode + NVC56F class-binding via SET_OBJECT@0x0, spec-faithful). Adds a GRAPHICS class: a game/driver PRODUCES a draw-command pushbuffer (SET_OBJECT graphics, SET_FB/W/H, CLEAR, per-triangle state, DRAW), the modeled GPU host/FIFO CONSUMES the ring, and the GRAPHICS engine (our rung-1 rasterizer) PRODUCES pixels into GPU VRAM with a Z-buffer. This is the same submit->execute loop as compute, now driving the screen. produce (draw cmds) -> GPFIFO ring -> consume (FIFO decode) -> graphics engine -> produce (pixels in VRAM) KAT: the scene renders THROUGH the command stream; the Z-buffer is correct through the pipeline (a far triangle submitted LAST does not overwrite the near one); a TAMPER pushbuffer with NO SET_OBJECT renders NOTHING (dispatch gated on class-bind, faithful to the FIFO spec); the produced frame exports to BMP. HONEST SCOPE: spec-faithful FIFO decode + class-bind LOGIC; method offsets for the graphics class are representative; real silicon exec = the bare-metal PCIe/doorbell last mile (BM-GPU-6/7). No hw writes (Rule 26). expect_exit: 0 license_tier: ORIGINAL