code wiki / (root) / nx_isa_conform_gate.nx

nx_isa_conform_gate.nx

buildroot/runtime/nx_isa_conform_gate.nx

44918 B1094 linesdepth 4pulls 9 transitivereach 0 importersview sourcekind gate/prooftopic isa
docsdependenciesstructsconstsfunctions

about

nx_isa_conform_gate.nx -- THE ISA CONFORMANCE RULER. WHY IT EXISTS: the estate carries TEN sovereign ISA emulators in NishiLang (rv64 arm64 armv7a cortexm loongarch64 mips64 ppc64le riscv32 s390x sparc64). Measured 2026-09-03 by nx_catalog: all ten are SOURCE-ONLY -- 0 built, 0 promoted, 0 registered, 0 invoked -- ONE of them had a KAT (rv64), two more had x86 tests, and the only differential proof in the estate was bench/gate_nx_emu_diff.sh, a SHELL script that needs WSL plus riscv64 binutils plus qemu in order to judge anything. Eight emulators had never been measured at all. THE LAW THIS ORGAN OBEYS: a capability asserted and never measured is a claim, not coverage. "We emulate MIPS64" is decided by running MIPS64 machine code, in process, against values taken FROM THE ISA MANUAL -- never from the emulator's own source, which would calibrate the ruler to the subject it is meant to judge. FIVE OUTCOMES, NEVER ONE: PASS ran and matched the manual-derived expectation WRONG-ANSWER ran to completion and computed the wrong value UNSUPPORTED hit an instruction class the emulator does not implement RAN-OFF-END the interpreter loop ended without an exit syscall FAULT bad PC, out-of-range access, or the step budget Collapsing these into "FAIL" is what makes a gap unactionable: an unimplemented instruction class and a miscomputed result need OPPOSITE fixes, and only the first is a missing feature. CORRECTION, 2026-09-03: the first cut of this header claimed "neither emulator can return -2, so the codes do not collide with a real answer". THAT WAS FALSE and I wrote it without reading far enough: nx_emu_rv64.nx line 50 defines EMU_RV_RANOFF = -2 and line 123 uses it as the INITIAL value of result, so -2 is exactly what comes back when the loop ends with no exit syscall. Treating it as WRONG-ANSWER would have reported a structural non-completion as an arithmetic disagreement -- the same two-conditions-under-one-negative-word defect this organ was written to refuse, committed inside the organ that refuses it. Both exit paths mask with & 0xff (rv64 line 302, mips64 SYSCALL), so a real answer is always 0..255 and the three negative sentinels cannot collide with one.

dependencies 7 imports · 0 importers

nx_gate_verdict.nx nx_syscalls.nx nx_emu_rv64.nx nx_emu_mips64.nx nx_emu_arm64.nx nx_emu_riscv32.nx nx_emu_ppc64le.nx nx_isa_conform_gate.nx

imports: nx_gate_verdict.nxnx_syscalls.nxnx_emu_rv64.nxnx_emu_mips64.nxnx_emu_arm64.nxnx_emu_riscv32.nxnx_emu_ppc64le.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main gv_head gv_puts sys_write gv_ctr sys_mmap nxa_die sys_write ↻ sys_exit nxa_lock_take nxa_lock_addr sys_write ↻ nxa_lock_give nxa_lock_addr ↻ nxa_report_overrun sys_write ↻ nxa_dump_printable sys_write ↻ nxa_dump_sizes sys_write ↻ sys_mmap ↻ gv_puts ↻ ic_nl sys_mmap ↻ sys_write ↻ ic_report ic_classify gv_puts ↻ gv_num sys_mmap ↻ sys_write ↻ sys_munmap ic_outcome_name ic_nl ↻ gv_cat gv_catn sys_mmap ↻ sys_munmap ↻ ic_rv64_imm_arith ic_guest

structs

none

consts

72const IC_GUEST_BYTES: i64 = 1048576 // 1 MiB guest image
73const IC_ENTRY: i64 = 0 // KAT code is loaded at guest vaddr 0
74const IC_SP: i64 = 983040 // 960 KiB: above the code, inside the image
75const IC_MODE_FILE: i64 = 420 // 0644. Mirrors the consolidated MODE_0644;
83const IC_UNSUPPORTED: i64 = -1
84const IC_RANOFF: i64 = -2
85const IC_FAULT: i64 = -3
88const IC_O_PASS: i64 = 0
89const IC_O_WRONG: i64 = 1
90const IC_O_UNSUP: i64 = 2
91const IC_O_FAULT: i64 = 3
92const IC_O_RANOFF: i64 = 4
100const IC_NB_BYTES: i64 = 2048
101const IC_NB_OFF: i64 = 0
102const IC_NB_PTR: i64 = 1
108const IC_NB_ROW_MAX: i64 = 256
109const IC_BOX_BYTES: i64 = 32
111const IC_NL: i64 = 10
112const IC_SPACE: i64 = 32
113const IC_DIG_LO: i64 = 48
114const IC_DIG_HI: i64 = 57
115const IC_UNSEEDED: i64 = -1
651const IC_RATCHET: *u8 = "knowledge/status/isa_conform.ratchet"

functions

120func ic_nl() -> i64
called by 2: ic_reportmain calls 2: sys_mmapsys_write
134func ic_put_le32(code: *u8, off: i64, w: i64) -> i64
142func ic_put_be32(code: *u8, off: i64, w: i64) -> i64
150func ic_guest() -> *u8 { return sys_mmap(IC_GUEST_BYTES) }
154func ic_classify(got: i64, want: i64) -> i64
called by 2: ic_reportmain
162func ic_outcome_name(o: i64) -> *u8
called by 2: ic_reportmain
173func ic_report(arch: *u8, kat: *u8, got: i64, want: i64, bx: *i64) -> i64
214func ic_rv64_imm_arith() -> i64
225func ic_rv64_sub() -> i64
236func ic_rv64_branch_loop() -> i64
256func ic_rv64_shift_logical() -> i64
266func ic_rv64_shift_arith() -> i64
276func ic_rv64_load_store() -> i64
291func ic_mi_addiu(rt: i64, rs: i64, imm: i64) -> i64
295func ic_mi_ori(rt: i64, rs: i64, imm: i64) -> i64
called by 1: ic_mips64_logic
299func ic_mi_rtype(rs: i64, rt: i64, rd: i64, sa: i64, fn: i64) -> i64
303func ic_mi_beq(rs: i64, rt: i64, off: i64) -> i64
called by 1: ic_mips64_branch
308func ic_mi_exit(m: *u8, o0: i64) -> i64
315func ic_mips64_imm_arith() -> i64
325func ic_mips64_sub() -> i64
335func ic_mips64_logic() -> i64
346func ic_mips64_shift() -> i64
362func ic_mips64_shift_logical() -> i64
378func ic_mips64_addiu32() -> i64
399func ic_mips64_branch() -> i64
422func ic_a64_movz(rd: i64, imm: i64, hw: i64) -> i64
425func ic_a64_movk(rd: i64, imm: i64, hw: i64) -> i64
428func ic_a64_add(rd: i64, rn: i64, rm: i64) -> i64
called by 1: ic_arm64_imm_arith
431func ic_a64_madd(rd: i64, rn: i64, rm: i64, ra: i64) -> i64
called by 1: ic_arm64_madd
434func ic_a64_cbz(rt: i64, off: i64) -> i64
called by 1: ic_arm64_cbz_taken
439func ic_a64_exit(m: *u8, o0: i64) -> i64
446func ic_arm64_imm_arith() -> i64
459func ic_arm64_movk_keeps_lanes() -> i64
468func ic_arm64_madd() -> i64
482func ic_arm64_cbz_taken() -> i64
502func ic_riscv32_imm_arith() -> i64
513func ic_riscv32_sub() -> i64
524func ic_riscv32_logic() -> i64
537func ic_riscv32_mul() -> i64
548func ic_riscv32_load_store() -> i64
559func ic_riscv32_branch_loop() -> i64
590func ic_pp_exit(m: *u8, o0: i64) -> i64
597func ic_ppc64le_imm_arith() -> i64
609func ic_ppc64le_sub() -> i64
619func ic_ppc64le_mul() -> i64
631func ic_ppc64le_logic() -> i64
653func ic_match_at(buf: *u8, n: i64, p: i64, s: *u8) -> i64
called by 1: ic_ratchet_read
667func ic_digits_at(buf: *u8, n: i64, p0: i64) -> i64
called by 1: ic_ratchet_read
691func ic_ratchet_read(arch: *u8) -> i64
724func ic_ratchet_write(rv: i64, mi: i64, a64: i64, r32: i64) -> i64
753func main(argc: i64, argv: *i64) -> i64