code wiki / _hdl_build / nx_mask_geom_test.nx

nx_mask_geom_test.nx

buildroot/runtime/_hdl_build/nx_mask_geom_test.nx

4673 B89 linesdepth 5pulls 5 transitivereach 0 importersview sourcekind gate/proof
docsdependenciesstructsconstsfunctions

about

nx_mask_geom_test.nx -- ACCEPTANCE GATE for the mask geometry + DRC. Exact-integer KATs on a simple 2-feature transistor-ish layout (a 1um gate + a 1um contact, 500nm apart) plus the makeable gate tying the critical dimension to machine resolution (the CPU-accuracy bridge).

dependencies 2 imports · 0 importers

nx_mask_geom.nx nx_syscalls.nx nx_mask_geom_test.nx

imports: nx_mask_geom.nxnx_syscalls.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main sys_mmap mk_critical_dimension mk_area mt_puts sys_write mt_putn sys_mmap ↻ sys_write ↻ mk_spacing mk_gap_x mk_max2 mk_min2 mk_right mk_gap_y mk_max2 ↻ mk_min2 ↻ mk_top mk_max2 ↻ mk_overlap mk_gap_x ↻ mk_gap_y ↻ mk_drc mk_overlap ↻ mk_spacing ↻ mk_makeable mk_critical_dimension ↻ mt_can_make mk_bbox mk_right ↻ mk_top ↻ sys_exit

structs

none

consts

none

functions

7func mt_puts(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
called by 1: main calls 1: sys_write
8func mt_putn(v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m;sys_write(1,"-" as *u8,1)} let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48 as u8;k=1} while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1} sys_write(1,bb,k); return 0 }
called by 1: main calls 2: sys_mmapsys_write
10func main() -> i64
calls 11: sys_mmapmk_critical_dimensionmk_areamt_putsmt_putnmk_spacing+5