nx_matmul_tile_kat.nx
buildroot/runtime/nx_matmul_tile_kat.nx
about
nx_matmul_tile_kat.nx -- proves the m>1 COLUMN-TILED matmul is BIT-EXACT against the existing kernel,
and measures what hoisting the column actually buys.
WHY: nx_batchscale_kat measured the matmul path FLAT across m (us_per_row 4705/4056/4295/4191 at
m=1/2/4/8, speedup 1.12x) -- the signature of each row re-streaming the weight column. mmt_range walks
OUTPUT CELLS, so column B[*,j] is read once PER ROW. mmt_tile_cols hoists that load: read the column
once, accumulate against all m rows.
THE EQUALITY CLAIM IS NOT A TOLERANCE CLAIM. For any (i,j) both kernels start at f32 zero and add over
kk ASCENDING -- identical order, so identical rounding. Only the interleaving across i differs. Anything
other than BIT-EQUALITY here means the tiled kernel changed the arithmetic, and that is a REJECT, not a
rounding difference to be waved through.
T4 is the load-bearing negative control: a DELIBERATELY WRONG tiled result must be caught by the same
comparison, so a passing T1-T3 cannot be an artefact of comparing a buffer with itself.
license_tier: ORIGINAL No hw writes (Rule 26). expect_exit: 0
dependencies 3 imports · 0 importers
imports: nx_f32_matmul_t.nxnx_f32_cvt.nxnx_fmt.nx
imported by: nobody (leaf or entry point)
call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown
structs
| none |
consts
| 21 | const TK: i64 = 896 |
| 22 | const TN: i64 = 512 |
| 23 | const TM: i64 = 8 |
functions
| 25 | func tk_lcg(s: i64) -> i64 called by 1: tk_fill |
| 31 | func tk_fill(p: *i64, count: i64, seed: i64) -> i64 |
| 42 | func tk_same(a: *i64, b: *i64, count: i64) -> i64 |
| 48 | func tk_nl() -> i64 { fmt_puts("\n" as *u8); return 0 } |
| 50 | func tk_t(name: *u8, cond: i64, ctr: *i64) |
| 58 | func main() -> i64 |
| 113 | func tk_m1_ok(A: *i64, B: *i64, r1: *i64, r2: *i64) -> i64 |