nx_q4k_dot_simd2_lib.nx

nx_q4k_dot_simd2_lib.nx -- the fused Q4_K SIMD dot with the COMPILER-EMITTED unpack (2026-09-02, LM4c). Same algebra as nx_q4k_dot_simd (nx_q4k_dot_simd_lib): per super-block the eight i32 lanes accumulate sum over all eight sub-blocks of (sc_sub*q)*col and ONE horizontal sum serves the super-block; the dmin term is a scalar sum of m_sub times the precomputed sub-block activation sums. The ONLY difference is HOW the 32 packed nibble bytes of a sub-block pair become 64 scaled i16 lanes: nx_q4k_dot_simd does it in scalar NishiLang (four u64 reads, eight bit-spreads, eight 64-bit multiplies -- about 1.4 ops per weight, the measured residual between the resident-Q4_K decode and the i16 cache route), this one calls __q4k_unpack32s, one intrinsic that nx_cc emits as 14 AVX2 instructions (vpmovzxbw, vpsrlw, vpand, vpmullw, vmovups). Bit-identical by construction: every lane ends up holding exactly (nibble * sc). REQUIRES a compiler that knows __q4k_unpack32s (nx_types OP_Q4KUNPACK32S); a consumer built with an older compiler fails to COMPILE, never silently falls back -- which is why this lives in its own lib and nx_q4k_dot_simd_lib stays as the compiler-neutral twin until the toolchain is promoted on every host. qbuf: 128 B caller scratch -- lo lanes at qbuf[0..31], hi lanes at qbuf[32..63] (i16), the layout __i16x16_madd consumes directly (two 32-byte halves per group). license_tier: ORIGINAL