nx_q4k_real_gemm.nx
buildroot/runtime/nx_q4k_real_gemm.nx
about
nx_q4k_real_gemm.nx -- the CPU SPEED PATH proven on a REAL Qwen weight: integer fused-dequant-dot vs f32.
sd-server -> Nishi migration (CPU perf track, SOTA-grounded: llama.cpp/ggml = quantized-integer GEMM, not
emulated f32). Reads the real `Huihui-Qwen3-4B-...-Q4_K_M.gguf`, takes blk.0.attn_q.weight (Q4_K), and
computes one output-neuron's projection two ways over row 0:
(A) INTEGER path -- `nx_q4k_dot_row_col` (fused dequant+dot, integer Q34 = Q24 weight x Q10 col; the
FAST path) -> Q10 -> f32. Q24 super-scales are EXACT (Q10/Q14 underflow/flip-sign on real weights).
(B) F32 path -- `nx_q4k_to_f32` (dequant to f32) + our emulated-f32 dot (the CORRECTNESS path).
Gates: (1) fused Q34 == manual sum of `nx_gguf_dequant_q4_k` (Q24) x activation (Q10), BIT-EXACT (the fused
kernel is correct on real weights); (2) integer(Q24)-path f32 ~ f32-path f32 within ~2%, both ~ +0.21576
(the true ggml row-0 dot). Bounded prefix read; only the one row is dequantized.
license_tier: ORIGINAL
dependencies 16 imports · 0 importers
diagram shows first 10 each side; +6 more imports, +0 more importers in the complete lists below.
imports: nx_syscalls.nxnx_tier.nxnx_le.nxnx_strconv.nxnx_tensor.nxnx_gguf.nxnx_gguf_load.nxnx_gguf_meta.nxnx_placement.nxnx_gguf_load_lazy.nxnx_q4k_matmul.nxnx_dequant_iter.nxnx_q4k_to_f32.nxnx_f32.nxnx_f32_cvt.nxnx_f32_div.nx
imported by: nobody (leaf or entry point)
call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown
structs
| none |
consts
| none |
functions
| 30 | func rg_emit(fd: i64, key: *u8, key_len: i64, value: i64) -> i64 |
| 44 | func main() -> i64 |