code wiki / _hdl_build / nx_regalloc_interp.nx

nx_regalloc_interp.nx

buildroot/runtime/_hdl_build/nx_regalloc_interp.nx

3435 B85 linesdepth 3pulls 3 transitivereach 4 importersview sourcekind librarytopic regalloc
docsdependenciesstructsconstsfunctions

about

nx_regalloc_interp.nx -- EXECUTION-equivalence verifier for register allocation. The static soundness checker (nx_regalloc_linscan: no two live vregs share a register) is necessary but the absorption gate wants more: PROVE that code run THROUGH the allocation (values living in physical registers + spill slots) computes the IDENTICAL result to the reference (one slot per value). Two interpreters, compared 1:1 over many inputs -- if they ever diverge, the allocation miscompiled (the g1 failure, caught before it can ship). The IR carries real opcodes so the interpretation is meaningful (it computes the race kernel's actual arithmetic). live-out values (loop-carried) are kept live to the block end so they remain readable -- exactly how a real backend treats them.

dependencies 1 imports · 3 importers

nx_regalloc_linscan.nx nx_regalloc_interp.nx nx_regalloc_absorb_governed_test.n nx_regalloc_calls.nx nx_regalloc_exec_test.nx

imports: nx_regalloc_linscan.nx

imported by: nx_regalloc_absorb_governed_test.nxnx_regalloc_calls.nxnx_regalloc_exec_test.nx

structs

none

consts

16const ROP_INPUT: i64 = 0 // imm = input index
17const ROP_MUL_IMM: i64 = 1
18const ROP_ADD_IMM: i64 = 2
19const ROP_SHR_IMM: i64 = 3
20const ROP_XOR: i64 = 4
21const ROP_AND_IMM: i64 = 5
22const ROP_ADD: i64 = 6
23const ROP_LT_IMM: i64 = 7
25const RI_SPILL: i64 = 0 - 1

functions

27func ri_op_eval(op: i64, a: i64, b: i64, imm: i64) -> i64
39func ri_get(v: i64, alloc: *i64, regf: *i64, spill: *i64) -> i64
46func ri_interp_ref(n: i64, op: *i64, u0: *i64, u1: *i64, imm: *i64, inputs: *i64,
called by 2: ab_engineer_okmain calls 1: ri_op_eval
66func ri_interp_alloc(n: i64, nreg: i64, op: *i64, u0: *i64, u1: *i64, imm: *i64,
called by 2: ab_engineer_okmain calls 2: ri_getri_op_eval