code wiki / _hdl_build / nx_regalloc_linscan_test.nx

nx_regalloc_linscan_test.nx

buildroot/runtime/_hdl_build/nx_regalloc_linscan_test.nx

4459 B95 linesdepth 3pulls 3 transitivereach 0 importersview sourcekind gate/prooftopic regalloc
docsdependenciesstructsconstsfunctions

about

nx_regalloc_linscan_test.nx -- prove the register allocator on two IRs: A. LOW pressure (a dependency chain, <= 2 live at once): nreg=8 -> 0 spills, memory traffic collapses (the stack tax eliminated). B. HIGH pressure (a tree reduction with a long-lived value, 5 live at once): nreg=3 -> MUST spill, and the allocation MUST STILL BE SOUND (no two live non-spilled vregs share a register -- the exact property the prior g1 regalloc attempt violated). Memory traffic still far below the baseline. Known answer: both allocations VALID (independent checker), A has 0 spills, B has spills > 0, and both reduce memory traffic vs the stack baseline. exit 0.

dependencies 1 imports · 0 importers

nx_regalloc_linscan.nx nx_regalloc_linscan_test.nx

imports: nx_regalloc_linscan.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main ra_puts ra_run ra_compute_last_use ra_linscan sys_mmap ra_validate sys_mmap ↻ ra_baseline_mem ra_regalloc_mem ra_emit ra_puts ↻

structs

none

consts

none

functions

14func ra_puts(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 }
called by 2: ra_emitmain
15func ra_emit(name: *u8, v: i64) -> i64
called by 1: main calls 1: ra_puts
26func ra_run(n: i64, nreg: i64, u0: *i64, u1: *i64, out: *i64) -> i64
39func main() -> i64