code wiki / _hdl_build / nx_riscv_loop.nx

nx_riscv_loop.nx

buildroot/runtime/_hdl_build/nx_riscv_loop.nx

4410 B70 linesdepth 4pulls 4 transitivereach 0 importersview sourcekind tooltopic riscv
docsdependenciesstructsconstsfunctions

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nx_riscv_loop.nx -- SOVEREIGN RISC-V backend, RUNG 3: CONTROL FLOW. Now uses the GENERAL nx_riscv_lib for the shared toolchain (encoders, lower with control flow, build_header, emulator) -- only the loop-IR + tests are local. Lowers/runs: acc=0; i=1; L0: acc += i; i += 1; if i <= N goto L0; return acc (triangular sum 1..N) T1 the lowered loop contains a real back-edge branch (0x63) and ends in ecall. T2 run N=5 -> exit 15. T3 (teeth) re-lower N=10 -> exit 55. expect_exit: 0 Sovereign: nx_riscv_lib (+ nx_syscalls).

dependencies 2 imports · 0 importers

nx_riscv_lib.nx nx_syscalls.nx nx_riscv_loop.nx

imports: nx_riscv_lib.nxnx_syscalls.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main g_puts sys_write sys_mmap nxa_die sys_write ↻ sys_exit nxa_lock_take nxa_lock_addr sys_write ↻ nxa_lock_give nxa_lock_addr ↻ nxa_report_overrun sys_write ↻ nxa_dump_printable sys_write ↻ nxa_dump_sizes sys_write ↻ build_loop_ir lower put32 enc_u enc_i enc_r enc_b build_header put32 ↻ put64 sys_openat_wr sys_write ↻ sys_close g_pn nxi_out nxi_fd sys_mmap ↻ ccz_cat_num nxi_buf sys_write ↻ sys_munmap ck

structs

none

consts

none

functions

10func build_loop_ir(irop: *i64, irdst: *i64, irs1: *i64, irs2: *i64, irimm: *i64, N: i64) -> i64
called by 2: gen_and_runmain
22func gen_and_run(N: i64) -> i64
34func main() -> i64