nx_robot_signal_gate.nx
buildroot/runtime/nx_robot_signal_gate.nx
about
nx_robot_signal_gate.nx -- R-ROBO-6 GATE: the hardware signal/register rung (STEP/DIR + PWM + GPIO),
built from the rung below (nx_robot_step pulse plan). VERIFIES:
(1) GPIO write/read + level-normalize (garbage level -> 1);
(2) NEVER-BRICK pin-mask: a write to a non-allowed pin is REJECTED and the pin is unchanged;
(3) STEP/DIR waveform from a pulse plan: rising-edge count EXACTLY equals the commanded steps
(round-trip pulses->waveform->steps), DIR level matches direction;
(4) full-move: command (20,8,-5); generate per-axis waveforms; rising edges == |delta| each,
negative axis sets DIR high;
(5) PWM: in-range duty -> exact high-count; over/under -> CLAMPED (never-brick);
(6) EXHAUSTIVE never-brick: sweep PWM duty -50..200 -> high-count always in [0,PERIOD];
(7) NEGATIVE CONTROL: a raw register write escapes the pin-mask (proving the mask is load-bearing).
100% sovereign, integer-only, hardware-rung-up. license_tier: ORIGINAL expect_exit: 0
dependencies 2 imports · 0 importers
imports: nx_syscalls.nxnx_robot_signal.nx
imported by: nobody (leaf or entry point)
call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown
structs
| none |
consts
| none |
functions
| 16 | func sw(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 } |
| 17 | func sn(v: i64) -> i64 |
| 27 | func check(name: *u8, cond: i64, tot: *i64) -> i64 |
| 33 | func abs_i(v: i64) -> i64 { if v < 0 { return 0 - v } return v } |
| 35 | func main() -> i64 |