code wiki / _hdl_build / nx_vc_fecwire_gate.nx
nx_vc_fecwire_gate.nx
buildroot/runtime/_hdl_build/nx_vc_fecwire_gate.nx
about
nx_vc_fecwire_gate.nx -- end-to-end gate for the TIER-2 substrate in the core: frame -> 10 wire
shards (vc_fecs_pack) -> lossy OUT-OF-ORDER delivery -> collector (vc_fecrx_add) -> byte-exact
frame. Exercises the REAL wire contract the striped legs will carry:
T1 pack: 10 self-describing shards (16B fwire header + S), slot size = 16+S
T2 lossy out-of-order reassembly: drop 2 shards, feed the rest shuffled -> completes exactly at
the 8th shard with the frame BYTE-EXACT (flen 11731 = non-multiple-of-8, padding exercised)
T3 duplicate shard ignored (returns 0, no double-delivery)
T4 straggler of a SUPERSEDED block dropped (newer block_id wins -- per-frame FEC semantics)
T5 NEG over-bound: 3 drops -> the block NEVER completes (honest bound)
T6 NEG malformed: wrong k byte -> -1
Evidence -> knowledge/status/vc_fecwire.log. expect_exit: 0 license_tier: ORIGINAL
dependencies 2 imports · 0 importers
imports: nx_syscalls.nxnx_video_client_wasm.nx
imported by: nobody (leaf or entry point)
call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown
structs
| none |
consts
| none |
functions
| 15 | func gw2(fd: i64, s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(fd,s,n); return 0 } |
| 16 | func gn2(fd: i64, v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m;sys_write(fd,"-" as *u8,1)} let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48 as u8;k=1} while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1} sys_write(fd,bb,k); return 0 } |
| 17 | func chk3(name: *u8, ok: i64, pass: *i64) -> i64 |
| 23 | func main() -> i64 |