_gpu_bm_pci_gate.nx

_gpu_bm_pci_gate.nx -- BARE-METAL SOVEREIGN-GPU rung BM-GPU-2: PCIe config-space enumeration + GPU identify + BAR decode against a spec-faithful sovereign PCIe config model. A sovereign driver parses the standard PCIe config space (last-mile hardware spec): vendor/device @0x00/0x02, class code @0x0B/0x0A, BAR0 @0x10 (MMIO, with the real WRITE-1s SIZE-DISCOVERY behavior), BAR1 @0x14/0x18 (64-bit prefetchable VRAM aperture). It identifies an NVIDIA discrete GPU (vendor 0x10DE, base-class 0x03=display) and decodes BAR base+size. This is the EXACT logic that runs against real /sys/bus/pci/config or ECAM at BM-GPU-6. NISHI-ECOSYSTEM-ONLY: our model + our driver; PCIe config layout = the last-mile hardware spec. HONEST SCOPE: enumeration LOGIC vs a spec-faithful model; the model's device-id (0x2C02) is a Blackwell-representative placeholder -- the REAL 5080 id is read from real hardware at BM-GPU-6. NO real silicon. GREEN iff: vendor==0x10DE (NVIDIA), base-class==0x03 (display=GPU), BAR0 is memory-space w/ base!=0 and size discovered ==16MiB (faithful write-1s sizing), BAR1 decoded as 64-bit prefetchable w/ base!=0; AND tampers (Intel vendor / network class / BAR0 IO-space bit) are correctly REJECTED/flagged by the driver. Marker -> knowledge/status/gpu_baremetal.log (BMPCIGATE). license_tier: ORIGINAL