_gpu_dxg_makeresident_gate.nx

_gpu_dxg_makeresident_gate.nx -- SOVEREIGN-GPU ladder R4f (make a real allocation GPU-RESIDENT on the 5080). After R4d (allocate) + R4e (map to GPU VA), R4f pins the allocation's pages into GPU-accessible memory via LX_DXMAKERESIDENT -- the last residency step before command submission can touch it. Async like map: completion is signaled when the paging queue's monitored fence reaches paging_fence_value (poll the R4c page). ABI (header-derived, recon-confirmed): LX_DXMAKERESIDENT = 0xC030470B (size 48). d3dddi_makeresident: paging_queue@0; alloc_count@4; allocation_list@8 (ptr->array of d3dkmthandle); priority_list@16 (ptr->array of u32); flags@24; paging_fence_value@32 (OUT); num_bytes_to_trim@40 (OUT). ret=259 STATUS_PENDING on a fresh allocation (then fence advances); a 2nd makeresident on the SAME alloc returns 0 (already resident). GREEN iff (author=organ, from REAL device returns): A) chain ok (device + paging queue [capture fence_cpu_va]); B) alloc #1 (fresh) makeresident ret==STATUS_PENDING(259) AND fence_target > fence-before AND the fence ADVANCES to it (poll the kernel fence page) = GPU completed the residency; C) alloc #2 (distinct, fresh) makeresident ret==259 AND fence_target2 > fence_target1 AND completes (per-allocation residency, real async work each time -- not a stuck constant); D) TAMPER: T1 bogus paging_queue -> neg; T2 bogus allocation handle in list -> neg; T3 alloc_count=0 -> neg; T4 on a non-dxg fd -> -ENOTTY. Marker -> knowledge/status/gpu_dxg.log (DXGRESGATE). raw syscalls only. NO-WAVE: pins memory resident; NO compute/throughput (R7). ZERO speedup. license_tier: ORIGINAL