code wiki / _hdl_build / nx_fpga_census.nx
nx_fpga_census.nx
buildroot/runtime/_hdl_build/nx_fpga_census.nx
about
nx_fpga_census.nx -- the FPGA-BOOT-SIM capability census as a code-defined seed into the SOVEREIGN seg-store
(knowledge/store/fpgacen-*, via nx_seg_store). Operator: "use the nishi ecosystem." The 9 rungs (R4-R10a) were
tracked only in Claude memory; this records them in the ecosystem's OWN sovereign storage + census machinery
(the nx_reader_census pattern: author-by-organ, idempotent, byte-verified -- NO TSV), AND GATE-BACKS the claim:
it forks the REAL R9 milestone gate live (must be GREEN) plus a neg-control bogus gate (must be non-zero) so the
census cannot fabricate a PRESENT it can't reproduce. Each cell names its proving gate; ALL 9 ran GREEN this
session. expect_exit: 0 license_tier: ORIGINAL
dependencies 3 imports · 0 importers
imports: nx_fpga_census_store.nxnx_seg_store.nxnx_syscalls.nx
imported by: nobody (leaf or entry point)
call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown
structs
| none |
consts
| 12 | const FCEN_RUNNER: *u8 = "_offc/nx_sov_build_run.elf" |
functions
| 14 | func cw(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 } |
| 15 | func cn(v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{sys_write(1,"-\x00" as *u8,1);m=0-m} let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48 as u8;k=1} while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1} sys_write(1,bb,k); return 0 } |
| 16 | func clen(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} return n } |
| 19 | func fc_run_gate(name: *u8) -> i64 |
| 36 | func main() -> i64 |