code wiki / _hdl_build / nx_fpga_lut_gate.nx

nx_fpga_lut_gate.nx

buildroot/runtime/_hdl_build/nx_fpga_lut_gate.nx

6419 B105 linesdepth 4pulls 5 transitivereach 0 importersview sourcekind gate/prooftopic fpga
docsdependenciesstructsconstsfunctions

dependencies 4 imports · 0 importers

nx_gate_gn.nx nx_gate_base.nx nx_fpga_lut.nx nx_syscalls.nx nx_fpga_lut_gate.nx

imports: nx_gate_gn.nxnx_gate_base.nxnx_fpga_lut.nxnx_syscalls.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main gw sys_write fl_gate_to_lut4 fl_gate_ref lut4_index lut4_index ↻ lut4_eval lut4_index ↻ gn sys_mmap fl_gate_ref ↻ fl_dff_next fl_kind_lutmappable sys_exit

structs

none

consts

none

functions

18func grow(name: *u8, ok: i64) -> i64 { if ok==1 { gw(" PASS " as *u8) } else { gw(" FAIL " as *u8) } gw(name); gw("
calls 1: gw
21func main() -> i64