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nx_rtype_control.nx
buildroot/runtime/_hdl_build/nx_rtype_control.nx
about
nx_rtype_control.nx -- sink-based R-type (opcode OP) decode->execute CONTROL: maps funct3/funct7
to an ALU op code, as gates. This is the glue between the decoder and the ALU -- the missing piece
for top-level CPU netlist composition. Mirrors the OP branch of nx_rv64im_sim_alu_select
(rv64im_min_sim.nx): funct3 selects the base op (funct7==0x20 picks SUB/SRA for f3 0/5), and
funct7==0x01 overlays the M-extension (mul/mulh/.../div/.../rem). MUX(sel, if_true, if_false) per
gsim. Flat idiom. Verified standalone by nx_rtype_control_mem_test (exhaustive over funct3 x funct7).
license_tier: ORIGINAL expect_exit: 0
dependencies 2 imports · 2 importers
imports: nx_cell_sink.nxrv64im_min_alu.nx
imported by: nx_cpu_rtype_exec_test.nxnx_rtype_control_mem_test.nx
structs
| none |
consts
| none |
functions
| 11 | func _rc_c(k: *NxCellSink, v: i64) -> i64 { return nx_sink_const(k, 64, v) } |
| 12 | func _rc_eq(k: *NxCellSink, a: i64, cval: i64) -> i64 |
| 17 | func _rc_mux(k: *NxCellSink, sel: i64, t: i64, f: i64) -> i64 |
| 22 | func nx_rtype_op_aluop_build(k: *NxCellSink, n_f3: i64, n_f7: i64) -> i64 |