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nx_alu_divider_r4.nx
buildroot/runtime/_hdl_build/nx_alu_divider_r4.nx
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nx_alu_divider_r4.nx -- the divider's QUANTITATIVE exceed: a RADIX-4 divider
that resolves 2 quotient bits per iteration, so W/2 subtract-stages instead of
the radix-2 restoring divider's W -- ~half the sequential latency depth.
This is the QUANT half of the full exceed (the QUAL half = exhaustive 100%
verification, nx_alu_divider_exhaustive_test). A full S-class exceed needs
BOTH: radix-4 must be FASTER (fewer stages, measured) AND still 100%-correct
(exhaustively verified) -- faster AND more capable.
Algorithm (radix-4 restoring, MSB-first, width even):
precompute b, 2b, 3b; rem=0, quo=0; for s in 0..W/2-1:
rem4 = (rem<<2) | next-2-bits(a)
q in {0,1,2,3} = count of {rem4>=b, rem4>=2b, rem4>=3b} (rem4<4b => q<=3)
rem = rem4 - q*b ; quo = (quo<<2) | q
Reuses nx_alu_divider's div_const/div_op2/div_mux gate-builders.
Research: radix-4 SRT/restoring division -- Parhami, Computer Arithmetic;
Hennessy & Patterson. [CANON] license_tier: ORIGINAL
dependencies 1 imports · 5 importers
imports: nx_alu_divider.nx
imported by: nx_alu_divider_r4_test.nxnx_alu_divider_r8.nxnx_alu_divider_race_test.nxnx_div_pick.nxnx_latency_metric_test.nx
structs
| none |
consts
| none |
functions
| 23 | func nx_div_synth_r4(g: *NxGsim, na: i64, nb: i64, width: i64, rem_out: *i64) -> i64 |