nx_fpga_shift.nx

nx_fpga_shift.nx -- LIB: RUNG 8c -- the ALU SHIFTS (SLL/SRL/SRA) as a BARREL SHIFTER on the LUT4 fabric. The classic log-depth structure: log2(W)=6 stages (for W=64), stage k conditionally shifts by 2^k iff shamt bit k is set. Two control bits unify all three shifts: `right` (0=left SLL, 1=right) and `arith` (right-shift fill = original sign bit for SRA, else 0 for SRL/SLL). Per bit per stage = 2 MUX LUT4s (pick the shifted source by direction, then pick shifted-vs-passthrough by shamt bit). Builds on nx_fpga_lut. FABRIC (npi = W+8): PI 0..W-1 = a, W..W+5 = shamt[0..5] (= b&0x3f), W+6 = right, W+7 = arith. ncells = 2+12W: cell 0 = const0 (init 0) cell 1 = fill = MUX(arith, 0, a_sign) [right-shift in-bit] stage k (k=0..5) cells [2+k*2W, 2+(k+1)*2W): per bit i: shifted_src = MUX(right, left_src, right_src), out = MUX(shamt_k, in_i, shifted_src); where left_src_i = (i>=2^k)? in(i-2^k):0, right_src_i = (i+2^k<W)? in(i+2^k):fill. Stage k's `in` vector = stage k-1's outputs (a for k=0). POs = stage-5 outputs. NEVER-BRICK (#26): pure integer, bounded (2+12W cells), total, deterministic, no hw write. license_tier: ORIGINAL