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nx_fpga_cmp.nx
buildroot/runtime/_hdl_build/nx_fpga_cmp.nx
about
nx_fpga_cmp.nx -- LIB: RUNG 8b -- the ALU COMPARE ops (SLT signed, SLTU unsigned) on the LUT4 fabric. New
mechanic: derive a result from a subtractor's INTERNAL signals (carry-out + sign bit), and use CONSTANT LUTs
(init 0xffff = always 1, the carry-in; init 0 = always 0, the fill). Computes a-b = a + ~b + 1, then:
SLTU = NOT(carry-out) -- unsigned a<b iff the subtraction borrows.
SLT = (a_sign XOR b_sign) ? a_sign : (a-b)_sign -- signed a<b, overflow-correct (differ-signs -> a is neg;
same-signs -> the (non-overflowing) diff's sign).
A control bit `unsigned` selects which (result in bit 0; bits 1..W-1 are 0). Verified vs nx_rv64im_alu_compute.
FABRIC (npi = 2W+1: PI 0..W-1=a, W..2W-1=b, 2W=unsigned). ncells = 3W+6:
cell 0 = const1 (init 0xffff) cell 1 = const0 (init 0)
cells 2..W+1 = notb_i = NOT(b_i)
cells W+2..3W+1 = ripple adder a_i + notb_i, carry_0 = const1 (sum cell W+2+2i, carry cell W+2+2i+1)
cell 3W+2 = sltu = NOT(carry-out) 3W+3 = diffsign = XOR(a_sign,b_sign)
cell 3W+4 = slt = MUX(diffsign, subsign, a_sign) 3W+5 = res = MUX(unsigned, slt, sltu)
NEVER-BRICK (#26): pure integer, bounded, total, deterministic, zero hardware writes.
license_tier: ORIGINAL
dependencies 4 imports · 9 importers
imports: nx_fpga_adder.nxnx_fpga_fabric.nxnx_fpga_lut.nxnx_syscalls.nx
imported by: nx_fpga_cmp_gate.nxnx_fpga_cpu2_gate.nxnx_fpga_cpu3_gate.nxnx_fpga_cpu4_gate.nxnx_fpga_cpu6_gate.nxnx_fpga_cpu_gate.nxnx_fpga_div_gate.nxnx_fpga_rtype_gate.nxnx_fpga_sdiv_gate.nx
structs
| none |
consts
| 21 | const K_MAGIC_65535: i64 = 65535 |
functions
| 23 | func fab_build_cmp(width: i64, inits: *i64, src: *i64, po_src: *i64) -> i64 |
| 74 | func fab_cmp_run(width: i64, npi: i64, inits: *i64, src: *i64, po_src: *i64, pi: *i64, co: *i64, a: i64, b: i64, unsigned: i64) -> i64 |