rv64im_min_mmu.nx

rv64im_min_mmu.nx -- the Sv39 PAGE-TABLE-WALK device (virtual-memory-paging-mmu). The genuine hard core of paging: a SOVEREIGN Sv39 multi-level address-translation datapath. On a doorbell the device reads satp (root page-table PPN + MODE) and a virtual address, WALKS the 3-level Sv39 page table in guest RAM (level 2->1->0, checking each PTE's Valid bit and detecting a leaf via the R/W/X bits, assembling the physical address with the right page size for the leaf level -- gigapage/megapage/4K), and latches the translated PADDR + a FAULT flag (set on an invalid PTE or a walk that reaches no leaf). This is the MMU's translation algorithm, exercised end-to-end by a driver (emitted by nx_drv_proto_emit) -- the same MMIO+doorbell pattern as the virtio/nndev devices. Wiring translation transparently into the CPU's load/store datapath + privilege modes + page-fault traps is the documented follow-on rung (this proves the WALK). Register window @ NX_MMU_BASE (256 bytes), independent instance (other devices untouched): 0x00 SATP_LO (WO) low 32 bits of satp (root PPN) 0x04 SATP_HI (WO) high 32 bits of satp (MODE in bits 31:28 -> satp bits 63:60; 8 = Sv39) 0x08 VADDR (WO) the (low 32 of the) virtual address to translate 0x0C DOORBELL (WO) write 1 -> walk the page table in guest RAM, latch PADDR + FAULT 0x10 PADDR (RO) translated physical address (low 32) from the last walk 0x14 FAULT (RO) 0 = translated OK; 1 = page fault (invalid PTE / no leaf) Status: SEED 2026-06-13 (virtual-memory-paging-mmu, Sv39 walk). license_tier: ORIGINAL