code wiki / _hdl_build / nx_fpga_board_gate.nx

nx_fpga_board_gate.nx

buildroot/runtime/_hdl_build/nx_fpga_board_gate.nx

8404 B119 linesdepth 5pulls 8 transitivereach 0 importersview sourcekind gate/prooftopic fpga
docsdependenciesstructsconstsfunctions

dependencies 6 imports · 0 importers

nx_gate_gn.nx nx_gate_base.nx nx_fpga_verilog.nx nx_fpga_seq.nx nx_fpga_fabric.nx nx_syscalls.nx nx_fpga_board_gate.nx

imports: nx_gate_gn.nxnx_gate_base.nxnx_fpga_verilog.nxnx_fpga_seq.nxnx_fpga_fabric.nxnx_syscalls.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main gw sys_write sys_mmap seq_build_counter fl_gate_to_lut4 fl_gate_ref lut4_index seq_eval fab_resolve lut4_eval lut4_index ↻ fab_po fab_resolve ↻ seq_tick seq_eval ↻ sys_mmap ↻ fab_resolve ↻ vlg_wr_str vlg_wr_int sys_mmap ↻ has_sub gn sys_exit

structs

none

consts

none

functions

18func grow(name: *u8, ok: i64) -> i64 { if ok==1 { gw(" PASS " as *u8) } else { gw(" FAIL " as *u8) } gw(name); gw("
calls 1: gw
21func has_sub(buf: *u8, len: i64, s: *u8) -> i64
29func render_frame(buf: *u8, off: i64, t: i64, val: i64) -> i64
49func main() -> i64