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nx_fpga_decode.nx

buildroot/runtime/_hdl_build/nx_fpga_decode.nx

3553 B65 linesdepth 4pulls 4 transitivereach 18 importersview sourcekind librarytopic fpga
docsdependenciesstructsconstsfunctions

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nx_fpga_decode.nx -- LIB: RUNG 9 -- the RV64I R-type DECODER on the LUT4 fabric: maps (funct3, funct7 bit 5) to the datapath CONTROL signals + a result-class selector, each as a LUT4 (a 4-input function of f3_0/f3_1/ f3_2/f7b5). This is the CONTROL UNIT the prior rungs left to the gate; composing it (decode on fabric) with the ALU/shift/compare datapaths (execute on fabric) is a full R-type instruction running on the simulated FPGA. Decode table (RV64I R-type, opcode 0x33): f3=0: ADD (f7b5=0) / SUB (f7b5=1) f3=1: SLL f3=2: SLT f3=3: SLTU f3=4: XOR f3=5: SRL (f7b5=0) / SRA (f7b5=1) f3=6: OR f3=7: AND Control outputs (each a LUT4 cell over PIs f3_0,f3_1,f3_2,f7b5): [0]sub [1]msel0 [2]msel1 (ALU datapath) [3]right [4]arith (shift) [5]unsigned (cmp) [6]class0 [7]class1 (result class: 0=ALU, 1=shift, 2=compare) NEVER-BRICK (#26): pure integer, 8 bounded LUT evals, total, deterministic, zero hardware writes. license_tier: ORIGINAL

dependencies 3 imports · 15 importers

nx_fpga_lut.nx nx_fpga_fabric.nx nx_syscalls.nx nx_fpga_decode.nx nx_fpga_boot_gate.nx nx_fpga_cpu2_gate.nx nx_fpga_cpu3_gate.nx nx_fpga_cpu4_gate.nx nx_fpga_cpu5_gate.nx nx_fpga_cpu6_gate.nx nx_fpga_cpu7_gate.nx nx_fpga_cpu8_gate.nx nx_fpga_cpu9_gate.nx nx_fpga_cpu_dc_gate.nx

diagram shows first 10 each side; +0 more imports, +5 more importers in the complete lists below.

imports: nx_fpga_lut.nxnx_fpga_fabric.nxnx_syscalls.nx

imported by: nx_fpga_boot_gate.nxnx_fpga_cpu2_gate.nxnx_fpga_cpu3_gate.nxnx_fpga_cpu4_gate.nxnx_fpga_cpu5_gate.nxnx_fpga_cpu6_gate.nxnx_fpga_cpu7_gate.nxnx_fpga_cpu8_gate.nxnx_fpga_cpu9_gate.nxnx_fpga_cpu_dc_gate.nxnx_fpga_cpu_gate.nxnx_fpga_ecall_gate.nxnx_fpga_lui_gate.nxnx_fpga_rexec.nxnx_fpga_rtype_gate.nx

structs

none

consts

none

functions

19func r9_sub(f3: i64, f7b5: i64) -> i64 { if f3==0 { if f7b5==1 { return 1 } } return 0 }
20func r9_msel0(f3: i64) -> i64 { if f3==0 { return 1 } if f3==6 { return 1 } return 0 }
21func r9_msel1(f3: i64) -> i64 { if f3==0 { return 1 } if f3==4 { return 1 } return 0 }
22func r9_right(f3: i64) -> i64 { if f3==5 { return 1 } return 0 }
23func r9_arith(f3: i64, f7b5: i64) -> i64 { if f3==5 { if f7b5==1 { return 1 } } return 0 }
24func r9_uns(f3: i64) -> i64 { if f3==3 { return 1 } return 0 }
25func r9_class(f3: i64) -> i64 { if f3==1 { return 1 } if f3==5 { return 1 } if f3==2 { return 2 } if f3==3 { return 2 } return 0 }
28func fab_build_decode(inits: *i64, src: *i64, po_src: *i64) -> i64
59func fab_decode_run(inits: *i64, src: *i64, po_src: *i64, pi: *i64, co: *i64, f3: i64, f7b5: i64, ctrl: *i64) -> i64