nx_fpga_rexec.nx

nx_fpga_rexec.nx -- LIB: RUNG 32b -- the R-type ALU-class EXECUTE datapath as ONE composed fabric. Folds the R9 DECODER fabric (nx_fpga_decode: funct3/funct7b5 -> control) and the R8 ALU datapath (nx_fpga_alu: a,b,sub,msel0,msel1 -> result) into a SINGLE fabric via fab_append (R32a), wiring the decoder's {sub,msel0,msel1} control OUTPUTS directly into the ALU's control PIs. The composed fabric takes (funct3 bits, funct7b5, a[W], b[W]) and outputs the W-bit ALU result for the DECODED op -- the control unit + datapath as ONE synthesizable netlist (vs R29 which emitted the ALU alone, no decode). This is the first REAL-CPU-MODULE monolithic fold (toward the whole-CPU CPU.v); shift+compare+result-MUX for the full 10-op R-type are the next rung (R32b-2). Covers the ALU-class ops: ADD/SUB/XOR/OR/AND. NEVER-BRICK (#26): pure memory, bounded (8 + 9W cells), deterministic, zero hardware-state writes. license_tier: ORIGINAL